Lines Matching +full:en7523 +full:- +full:scu

1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/en7523-clk.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
13 reserved-memory {
14 #address-cells = <1>;
15 #size-cells = <1>;
19 no-map;
24 no-map;
29 no-map;
34 no-map;
39 no-map;
45 compatible = "arm,psci-0.2";
50 #address-cells = <1>;
51 #size-cells = <0>;
53 cpu-map {
66 compatible = "arm,cortex-a53";
68 enable-method = "psci";
69 clock-frequency = <80000000>;
70 next-level-cache = <&L2_0>;
75 compatible = "arm,cortex-a53";
77 enable-method = "psci";
78 clock-frequency = <80000000>;
79 next-level-cache = <&L2_0>;
82 L2_0: l2-cache0 {
84 cache-level = <2>;
85 cache-unified;
89 scu: system-controller@1fa20000 { label
90 compatible = "airoha,en7523-scu";
93 #clock-cells = <1>;
96 gic: interrupt-controller@9000000 {
97 compatible = "arm,gic-v3";
98 interrupt-controller;
99 #interrupt-cells = <3>;
100 #address-cells = <1>;
101 #size-cells = <1>;
111 compatible = "arm,armv8-timer";
112 interrupt-parent = <&gic>;
122 reg-io-width = <4>;
123 reg-shift = <2>;
125 clock-frequency = <1843200>;
130 compatible = "airoha,en7523-gpio";
135 gpio-controller;
136 #gpio-cells = <2>;
140 compatible = "airoha,en7523-gpio";
145 gpio-controller;
146 #gpio-cells = <2>;
150 compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
153 reg-names = "port0";
154 linux,pci-domain = <0>;
155 #address-cells = <3>;
156 #size-cells = <2>;
158 interrupt-names = "pcie_irq";
159 clocks = <&scu EN7523_CLK_PCIE>;
160 clock-names = "sys_ck0";
161 bus-range = <0x00 0xff>;
165 #interrupt-cells = <1>;
166 interrupt-map-mask = <0 0 0 7>;
167 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
171 pcie_intc0: interrupt-controller {
172 interrupt-controller;
173 #address-cells = <0>;
174 #interrupt-cells = <1>;
179 compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
182 reg-names = "port1";
183 linux,pci-domain = <1>;
184 #address-cells = <3>;
185 #size-cells = <2>;
187 interrupt-names = "pcie_irq";
188 clocks = <&scu EN7523_CLK_PCIE>;
189 clock-names = "sys_ck1";
190 bus-range = <0x00 0xff>;
194 #interrupt-cells = <1>;
195 interrupt-map-mask = <0 0 0 7>;
196 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
200 pcie_intc1: interrupt-controller {
201 interrupt-controller;
202 #address-cells = <0>;
203 #interrupt-cells = <1>;