Lines Matching +full:support +full:- +full:pulse +full:- +full:signal

1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
8 -
12 working modes a dpll can support, differentiates if and how dpll selects
16 -
20 -
23 render-max: true
24 -
26 name: lock-status
31 -
37 -
40 dpll is locked to a valid signal, but no holdover available
41 -
42 name: locked-ho-acq
45 -
48 dpll is in holdover state - lost a valid lock or was forced
50 when dpll lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ,
51 if dpll lock-state was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the
52 dpll's lock-state shall remain DPLL_LOCK_STATUS_UNLOCKED)
53 render-max: true
54 -
56 name: lock-status-error
62 -
67 -
73 -
74 name: media-down
80 -
81 name: fractional-frequency-offset-too-high
87 render-max: true
88 -
90 name: clock-quality-level
93 the dpll lock-status is DPLL_LOCK_STATUS_HOLDOVER.
94 The current list is defined according to the table 11-7 contained
95 in ITU-T G.8264/Y.1364 document. One may extend this list freely
96 by other ITU-T defined clock qualities, or different ones defined
100 -
101 name: itu-opt1-prc
103 -
104 name: itu-opt1-ssu-a
105 -
106 name: itu-opt1-ssu-b
107 -
108 name: itu-opt1-eec1
109 -
110 name: itu-opt1-prtc
111 -
112 name: itu-opt1-eprtc
113 -
114 name: itu-opt1-eeec
115 -
116 name: itu-opt1-eprc
117 render-max: true
118 -
120 name: temp-divider
129 -
134 -
136 doc: dpll produces Pulse-Per-Second signal
138 -
141 render-max: true
142 -
144 name: pin-type
149 -
153 -
156 -
157 name: synce-eth-port
159 -
160 name: int-oscillator
162 -
165 render-max: true
166 -
168 name: pin-direction
173 -
175 doc: pin used as a input of a signal
177 -
179 doc: pin used to output the signal
180 render-max: true
181 -
183 name: pin-frequency-1-hz
185 -
187 name: pin-frequency-10-khz
189 -
191 name: pin-frequency-77-5-khz
193 -
195 name: pin-frequency-10-mhz
197 -
199 name: pin-state
204 -
208 -
211 -
214 render-max: true
215 -
217 name: pin-capabilities
222 -
223 name: direction-can-change
225 -
226 name: priority-can-change
228 -
229 name: state-can-change
231 -
233 name: phase-offset-divider
237 measured signal phase difference between a pin and dpll device
243 -
245 name: feature-state
249 -
253 -
258 attribute-sets:
259 -
261 enum-name: dpll_a
263 -
266 -
267 name: module-name
269 -
272 -
273 name: clock-id
275 -
279 -
280 name: mode-supported
283 multi-attr: true
284 -
285 name: lock-status
287 enum: lock-status
288 -
291 -
295 -
296 name: lock-status-error
298 enum: lock-status-error
299 -
300 name: clock-quality-level
302 enum: clock-quality-level
303 multi-attr: true
306 the dpll lock-status is DPLL_LOCK_STATUS_HOLDOVER. This could
310 -
311 name: phase-offset-monitor
313 enum: feature-state
318 -
319 name: phase-offset-avg-factor
322 -
324 enum-name: dpll_a_pin
326 -
329 -
330 name: parent-id
332 -
333 name: module-name
335 -
338 -
339 name: clock-id
341 -
342 name: board-label
344 -
345 name: panel-label
347 -
348 name: package-label
350 -
353 enum: pin-type
354 -
357 enum: pin-direction
358 -
361 -
362 name: frequency-supported
364 multi-attr: true
365 nested-attributes: frequency-range
366 -
367 name: frequency-min
369 -
370 name: frequency-max
372 -
375 -
378 enum: pin-state
379 -
382 enum: pin-capabilities
383 -
384 name: parent-device
386 multi-attr: true
387 nested-attributes: pin-parent-device
388 -
389 name: parent-pin
391 multi-attr: true
392 nested-attributes: pin-parent-pin
393 -
394 name: phase-adjust-min
396 -
397 name: phase-adjust-max
399 -
400 name: phase-adjust
402 -
403 name: phase-offset
405 -
406 name: fractional-frequency-offset
411 (rx_frequency-tx_frequency)/rx_frequency
415 -
416 name: esync-frequency
419 Frequency of Embedded SYNC signal. If provided, the pin is configured
420 with a SYNC signal embedded into its base clock frequency.
421 -
422 name: esync-frequency-supported
424 multi-attr: true
425 nested-attributes: frequency-range
427 If provided a pin is capable of embedding a SYNC signal (within given
428 range) into its base frequency signal.
429 -
430 name: esync-pulse
433 A ratio of high to low state of a SYNC signal pulse embedded
435 -
436 name: reference-sync
438 multi-attr: true
439 nested-attributes: reference-sync
442 reference-sync pin pair.
443 -
444 name: phase-adjust-gran
450 -
451 name: pin-parent-device
452 subset-of: pin
454 -
455 name: parent-id
456 -
458 -
460 -
462 -
463 name: phase-offset
464 -
465 name: pin-parent-pin
466 subset-of: pin
468 -
469 name: parent-id
470 -
472 -
473 name: frequency-range
474 subset-of: pin
476 -
477 name: frequency-min
478 -
479 name: frequency-max
480 -
481 name: reference-sync
482 subset-of: pin
484 -
486 -
490 enum-name: dpll_cmd
492 -
493 name: device-id-get
496 attribute-set: dpll
497 flags: [admin-perm]
500 pre: dpll-lock-doit
501 post: dpll-unlock-doit
504 - module-name
505 - clock-id
506 - type
509 - id
511 -
512 name: device-get
515 attribute-set: dpll
516 flags: [admin-perm]
519 pre: dpll-pre-doit
520 post: dpll-post-doit
523 - id
524 reply: &dev-attrs
526 - id
527 - module-name
528 - mode
529 - mode-supported
530 - lock-status
531 - lock-status-error
532 - temp
533 - clock-id
534 - type
535 - phase-offset-monitor
536 - phase-offset-avg-factor
539 reply: *dev-attrs
541 -
542 name: device-set
544 attribute-set: dpll
545 flags: [admin-perm]
548 pre: dpll-pre-doit
549 post: dpll-post-doit
552 - id
553 - phase-offset-monitor
554 - phase-offset-avg-factor
555 -
556 name: device-create-ntf
558 notify: device-get
560 -
561 name: device-delete-ntf
563 notify: device-get
565 -
566 name: device-change-ntf
568 notify: device-get
570 -
571 name: pin-id-get
574 attribute-set: pin
575 flags: [admin-perm]
578 pre: dpll-lock-doit
579 post: dpll-unlock-doit
582 - module-name
583 - clock-id
584 - board-label
585 - panel-label
586 - package-label
587 - type
590 - id
592 -
593 name: pin-get
597 - dump request without any attributes given - list all the pins in the
599 - dump request with target dpll - list all the pins registered with
601 - do request with target dpll and target pin - single pin attributes
602 attribute-set: pin
603 flags: [admin-perm]
606 pre: dpll-pin-pre-doit
607 post: dpll-pin-post-doit
610 - id
611 reply: &pin-attrs
613 - id
614 - module-name
615 - clock-id
616 - board-label
617 - panel-label
618 - package-label
619 - type
620 - frequency
621 - frequency-supported
622 - capabilities
623 - parent-device
624 - parent-pin
625 - phase-adjust-gran
626 - phase-adjust-min
627 - phase-adjust-max
628 - phase-adjust
629 - fractional-frequency-offset
630 - esync-frequency
631 - esync-frequency-supported
632 - esync-pulse
633 - reference-sync
638 - id
639 reply: *pin-attrs
641 -
642 name: pin-set
644 attribute-set: pin
645 flags: [admin-perm]
648 pre: dpll-pin-pre-doit
649 post: dpll-pin-post-doit
652 - id
653 - frequency
654 - direction
655 - prio
656 - state
657 - parent-device
658 - parent-pin
659 - phase-adjust
660 - esync-frequency
661 - reference-sync
662 -
663 name: pin-create-ntf
665 notify: pin-get
667 -
668 name: pin-delete-ntf
670 notify: pin-get
672 -
673 name: pin-change-ntf
675 notify: pin-get
678 mcast-groups:
680 -