Lines Matching +full:per +full:- +full:pin
10 The generic NAND driver supports almost all NAND and AG-AND based chips
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
48 - [GENERIC]
53 - [DEFAULT]
65 -------------------------------
71 - [INTERN]
77 - [REPLACEABLE]
86 - [BOARDSPECIFIC]
92 - [OPTIONAL]
105 -------------
131 -----------------
150 -------------------------
164 case NAND_CTL_SETCLE: /* Set CLE pin high */ break;
165 case NAND_CTL_CLRCLE: /* Set CLE pin low */ break;
166 case NAND_CTL_SETALE: /* Set ALE pin high */ break;
167 case NAND_CTL_CLRALE: /* Set ALE pin low */ break;
168 case NAND_CTL_SETNCE: /* Set nCE pin low */ break;
169 case NAND_CTL_CLRNCE: /* Set nCE pin high */ break;
174 *Address lines based example.* It's assumed that the nCE pin is driven
183 case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;
184 case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
185 case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;
186 case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
192 ---------------------
194 If the hardware interface has the ready busy pin of the NAND chip
195 connected to a GPIO or other accessible I/O pin, this function is used
196 to read back the state of the pin. The function has no arguments and
197 should return 0, if the device is busy (R/B pin is low) and 1, if the
198 device is ready (R/B pin is high). If the hardware interface does not
199 give access to the ready busy pin, then the function must not be defined
200 and the function pointer this->legacy.dev_ready is set to NULL.
203 -------------
223 err = -ENOMEM;
233 err = -EIO;
238 this->legacy.IO_ADDR_R = baseaddr;
239 this->legacy.IO_ADDR_W = baseaddr;
241 this->hwcontrol = board_hwcontrol;
243 this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;
245 this->legacy.dev_ready = board_dev_ready;
246 this->eccmode = NAND_ECC_SOFT;
250 err = -ENXIO;
268 -------------
302 ---------------------
341 this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;
342 this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
345 this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;
346 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
350 this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;
351 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
358 --------------------
365 - NAND_ECC_HW3_256
367 Hardware ECC generator providing 3 bytes ECC per 256 byte.
369 - NAND_ECC_HW3_512
371 Hardware ECC generator providing 3 bytes ECC per 512 byte.
373 - NAND_ECC_HW6_512
375 Hardware ECC generator providing 6 bytes ECC per 512 byte.
377 - NAND_ECC_HW8_512
379 Hardware ECC generator providing 8 bytes ECC per 512 byte.
386 - enable_hwecc
393 - calculate_ecc
400 - correct_data
404 corrected. If the error is not correctable return -1. If your
412 Many hardware ECC implementations provide Reed-Solomon codes and
414 standard Reed-Solomon syndrome before calling the error correction code
415 in the generic Reed-Solomon library.
422 code. Provide a matching oob-layout in this case. See rts_from4.c and
429 -----------------------
440 - Per device
445 - Per chip
447 A bad block table is used per chip and contains the bad block
450 - Fixed offset
455 - Automatic placed
460 - Mirrored tables
478 AG-AND chips this is mandatory, as they have no factory marked bad
493 nand chip structure before calling nand_scan(). For AG-AND chips is
498 - Store bad block table per chip
500 - Use 2 bits per block
502 - Automatic placement at the end of the chip
504 - Use mirrored tables with version numbers
506 - Reserve 4 blocks at the end of the chip
523 - Number of bits per block
527 - Table per chip
531 set then a per device bad block table is used.
533 - Table location is absolute
537 you have selected bad block tables per chip and you have a multi chip
542 - Table location is automatically detected
554 - Table creation
560 - Table write support
571 - Table version control
582 - Save block contents on write
591 - Number of reserved blocks
601 --------------------------
606 - Placement defined by fs driver
608 - Automatic placement
630 - useecc
633 file include/mtd/mtd-abi.h contains constants to select ecc and
639 - eccbytes
641 The eccbytes member defines the number of ecc bytes per page.
643 - eccpos
648 - oobfree
663 is (number of pages) \* ((size of spare area) + (number of ecc steps per
684 size per page is determined by the oobfree array in the nand_oobinfo
691 ----------------------------------------
736 0x08 - 0x0F Autoplace 0 - 7
750 0x02-0x27 Autoplace 0 - 37
810 it again, are restricted to 1-3 writes, depending on the manufacturers
826 - flasherase, flasheraseall: Erase and format FLASH partitions
828 - nandwrite: write filesystem images to NAND FLASH
830 - nanddump: dump the contents of a NAND FLASH partitions
843 ---------------------
848 These constants are defined in rawnand.h. They are OR-ed together to
870 These constants are defined in rawnand.h. They are OR-ed together to
875 * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
880 -----------------------
886 /* Software ECC 3 byte ECC per 256 Byte data */
888 /* Hardware ECC 3 byte ECC per 256 Byte data */
890 /* Hardware ECC 3 byte ECC per 512 Byte data */
892 /* Hardware ECC 6 byte ECC per 512 Byte data */
894 /* Hardware ECC 8 byte ECC per 512 Byte data */
899 ----------------------------------
923 ---------------------------------
930 /* The number of bits used per block in the bbt on the device */
940 /* bbt is stored per chip on multichip devices */
961 .. kernel-doc:: include/linux/mtd/rawnand.h
972 .. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
984 .. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
987 .. kernel-doc:: drivers/mtd/nand/raw/nand_bbt.c