Lines Matching +full:dt +full:- +full:mmio
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
19 - items:
20 - const: qcom,sdx65-pcie-ep
21 - const: qcom,sdx55-pcie-ep
26 - description: Qualcomm-specific PARF configuration registers
27 - description: DesignWare PCIe registers
28 - description: External local bus interface registers
29 - description: Address Translation Unit (ATU) registers
30 - description: Memory region used to map remote RC address space
31 - description: BAR memory region
32 - description: DMA register space
34 reg-names:
37 - const: parf
38 - const: dbi
39 - const: elbi
40 - const: atu
41 - const: addr_space
42 - const: mmio
43 - const: dma
49 clock-names:
53 qcom,perst-regs:
57 $ref: /schemas/types.yaml#/definitions/phandle-array
59 - items:
60 - description: Syscon to TCSR system registers
61 - description: Perst enable offset
62 - description: Perst separation enable offset
67 - description: PCIe Global interrupt
68 - description: PCIe Doorbell interrupt
69 - description: DMA interrupt
71 interrupt-names:
74 - const: global
75 - const: doorbell
76 - const: dma
78 reset-gpios:
82 wake-gpios:
89 interconnect-names:
91 - const: pcie-mem
92 - const: cpu-pcie
97 reset-names:
100 power-domains:
106 phy-names:
109 num-lanes:
113 - compatible
114 - reg
115 - reg-names
116 - clocks
117 - clock-names
118 - interrupts
119 - interrupt-names
120 - reset-gpios
121 - interconnects
122 - interconnect-names
123 - resets
124 - reset-names
125 - power-domains
128 - $ref: pci-ep.yaml#
129 - if:
134 - qcom,sdx55-pcie-ep
139 reg-names:
143 - description: PCIe Auxiliary clock
144 - description: PCIe CFG AHB clock
145 - description: PCIe Master AXI clock
146 - description: PCIe Slave AXI clock
147 - description: PCIe Slave Q2A AXI clock
148 - description: PCIe Sleep clock
149 - description: PCIe Reference clock
150 clock-names:
152 - const: aux
153 - const: cfg
154 - const: bus_master
155 - const: bus_slave
156 - const: slave_q2a
157 - const: sleep
158 - const: ref
161 interrupt-names:
164 - if:
169 - qcom,sm8450-pcie-ep
174 reg-names:
178 - description: PCIe Auxiliary clock
179 - description: PCIe CFG AHB clock
180 - description: PCIe Master AXI clock
181 - description: PCIe Slave AXI clock
182 - description: PCIe Slave Q2A AXI clock
183 - description: PCIe Reference clock
184 - description: PCIe DDRSS SF TBU clock
185 - description: PCIe AGGRE NOC AXI clock
186 clock-names:
188 - const: aux
189 - const: cfg
190 - const: bus_master
191 - const: bus_slave
192 - const: slave_q2a
193 - const: ref
194 - const: ddrss_sf_tbu
195 - const: aggre_noc_axi
198 interrupt-names:
201 - if:
206 - qcom,sa8775p-pcie-ep
212 reg-names:
217 - description: PCIe Auxiliary clock
218 - description: PCIe CFG AHB clock
219 - description: PCIe Master AXI clock
220 - description: PCIe Slave AXI clock
221 - description: PCIe Slave Q2A AXI clock
222 clock-names:
224 - const: aux
225 - const: cfg
226 - const: bus_master
227 - const: bus_slave
228 - const: slave_q2a
232 interrupt-names:
239 - |
240 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
241 #include <dt-bindings/gpio/gpio.h>
242 #include <dt-bindings/interconnect/qcom,sdx55.h>
243 #include <dt-bindings/interrupt-controller/arm-gic.h>
245 pcie_ep: pcie-ep@1c00000 {
246 compatible = "qcom,sdx55-pcie-ep";
253 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
254 "mmio";
263 clock-names = "aux", "cfg", "bus_master", "bus_slave",
266 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
270 interrupt-names = "global", "doorbell";
273 interconnect-names = "pcie-mem", "cpu-pcie";
274 reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
275 wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
277 reset-names = "core";
278 power-domains = <&gcc PCIE_GDSC>;
280 phy-names = "pciephy";
281 max-link-speed = <3>;
282 num-lanes = <2>;
283 linux,pci-domain = <0>;