Lines Matching +full:shadow +full:- +full:interrupts
2 Register Usage for Linux/PA-RISC
11 -----------------
15 CR 1-CR 7(undefined) unused
16 CR 8 (Protection ID) per-process value*
23 CR17-CR22 interruption parameters
28 CR23 (EIRR) read for pending interrupts/write clears bits
40 -----------------------------
44 SR4-SR7 set to 0
51 ---------------------------
58 SR4-SR7 Defines short address space for user/kernel
63 ---------------------
66 W (64-bit addresses) 0
67 E (Little-endian) 0
70 H (Higher-privilege trap) 0
71 L (Lower-privilege trap) 0
75 C (code address translation) 1, 0 while executing real-mode code
84 D (Data address translation) 1, 0 while executing real-mode code
89 ---------------------
94 Shadow Registers used by interruption handler code
98 -------------------------------------------------------------------------
100 The PA-RISC architecture defines 7 registers as "shadow registers".
104 Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
106 -------------------------------------------------------------------------
113 r1,r2,r19-r26,r28,r29 & r31 can be used without saving them first. And of
131 r19-r22:
133 Note that in 64 bit they are arg7-arg4.
135 r23-r26:
136 these are arg3-arg0, i.e. you can use them if you
151 r3-r18,r27,r30 need to be saved and restored. r3-r18 are just