1298 	IWK_WRITE(sc, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);  in iwk_reset_rx_ring()
1438 	IWK_WRITE(sc, IWK_FH_TCSR_CHNL_TX_CONFIG_REG(ring->qid), 0);  in iwk_reset_tx_ring()
1949 	IWK_WRITE(sc, CSR_GP_CNTRL,  in iwk_mac_access_enter()
1972 	IWK_WRITE(sc, CSR_GP_CNTRL,  in iwk_mac_access_exit()
1979 	IWK_WRITE(sc, HBUS_TARG_MEM_RADDR, addr);  in iwk_mem_read()
1986 	IWK_WRITE(sc, HBUS_TARG_MEM_WADDR, addr);  in iwk_mem_write()
1987 	IWK_WRITE(sc, HBUS_TARG_MEM_WDAT, data);  in iwk_mem_write()
1993 	IWK_WRITE(sc, HBUS_TARG_PRPH_RADDR, addr | (3 << 24));  in iwk_reg_read()
2000 	IWK_WRITE(sc, HBUS_TARG_PRPH_WADDR, addr | (3 << 24));  in iwk_reg_write()
2001 	IWK_WRITE(sc, HBUS_TARG_PRPH_WDAT, data);  in iwk_reg_write()
2308 			IWK_WRITE(sc, HBUS_TARG_WRPTR, (i << 8));  in iwk_ucode_alive()
2357 	IWK_WRITE(sc, CSR_INT_MASK, 0);  in iwk_rx_softintr()
2460 	IWK_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, index & (~7));  in iwk_rx_softintr()
2464 	IWK_WRITE(sc, CSR_INT_MASK, CSR_INI_SET_MASK);  in iwk_rx_softintr()
2496 	IWK_WRITE(sc, CSR_INT_MASK, 0);  in iwk_intr()
2498 	IWK_WRITE(sc, CSR_INT, r);  in iwk_intr()
2499 	IWK_WRITE(sc, CSR_FH_INT_STATUS, rfh);  in iwk_intr()
2541 	IWK_WRITE(sc, CSR_INT_MASK, CSR_INI_SET_MASK);  in iwk_intr()
2920 	IWK_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);  in iwk_send()
3483 	IWK_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);  in iwk_cmd()
3797 	IWK_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);  in iwk_scan()
3946 	IWK_WRITE(sc, CSR_RESET, tmp | CSR_RESET_REG_FLAG_STOP_MASTER);  in iwk_stop_master()
3988 	IWK_WRITE(sc, CSR_INT, 0xffffffff);  in iwk_preinit()
3991 	IWK_WRITE(sc, CSR_GIO_CHICKEN_BITS,  in iwk_preinit()
3995 	IWK_WRITE(sc, CSR_GP_CNTRL, tmp | CSR_GP_CNTRL_REG_FLAG_INIT_DONE);  in iwk_preinit()
4020 	IWK_WRITE(sc, CSR_INT_COALESCING, 512 / 32); /* ??? */  in iwk_preinit()
4042 	IWK_WRITE(sc, CSR_SW_VER, tmp);  in iwk_preinit()
4067 		IWK_WRITE(sc, CSR_HW_IF_CONFIG_REG,  in iwk_eep_sem_down()
4088 	IWK_WRITE(sc, CSR_HW_IF_CONFIG_REG,  in iwk_eep_sem_up()
4118 		IWK_WRITE(sc, CSR_EEPROM_REG, addr<<1);  in iwk_eep_load()
4120 		IWK_WRITE(sc, CSR_EEPROM_REG, tmp & ~(0x2));  in iwk_eep_load()
4177 	IWK_WRITE(sc, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);  in iwk_init()
4179 	IWK_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);  in iwk_init()
4180 	IWK_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_BASE_REG,  in iwk_init()
4183 	IWK_WRITE(sc, FH_RSCSR_CHNL0_STTS_WPTR_REG,  in iwk_init()
4187 	IWK_WRITE(sc, FH_MEM_RCSR_CHNL0_CONFIG_REG,  in iwk_init()
4194 	IWK_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG,  in iwk_init()
4206 		IWK_WRITE(sc, FH_MEM_CBBC_QUEUE(qid),  in iwk_init()
4208 		IWK_WRITE(sc, IWK_FH_TCSR_CHNL_TX_CONFIG_REG(qid),  in iwk_init()
4215 	IWK_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwk_init()
4216 	IWK_WRITE(sc, CSR_UCODE_DRV_GP1_CLR,  in iwk_init()
4220 	IWK_WRITE(sc, CSR_INT, 0xffffffff);  in iwk_init()
4223 	IWK_WRITE(sc, CSR_INT_MASK, CSR_INI_SET_MASK);  in iwk_init()
4225 	IWK_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwk_init()
4226 	IWK_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwk_init()
4245 		IWK_WRITE(sc, CSR_RESET, 0);  in iwk_init()
4293 	IWK_WRITE(sc, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);  in iwk_stop()
4295 	IWK_WRITE(sc, CSR_INT_MASK, 0);  in iwk_stop()
4296 	IWK_WRITE(sc, CSR_INT, CSR_INI_SET_MASK);  in iwk_stop()
4297 	IWK_WRITE(sc, CSR_FH_INT_STATUS, 0xffffffff);  in iwk_stop()
4319 	IWK_WRITE(sc, CSR_RESET, tmp | CSR_RESET_REG_FLAG_SW_RESET);  in iwk_stop()