1110 	pthread_mutex_init(&pdi->pi_lintr.lock, NULL);  in pci_emul_init()
1111 	pdi->pi_lintr.pin = 0;  in pci_emul_init()
1112 	pdi->pi_lintr.state = IDLE;  in pci_emul_init()
1113 	pdi->pi_lintr.pirq_pin = 0;  in pci_emul_init()
1114 	pdi->pi_lintr.ioapic_irq = 0;  in pci_emul_init()
1957 	pi->pi_lintr.pin = bestpin + 1;  in pci_lintr_request()
1967 	if (pi->pi_lintr.pin == 0)  in pci_lintr_route()
1972 	ii = &bi->slotinfo[pi->pi_slot].si_intpins[pi->pi_lintr.pin - 1];  in pci_lintr_route()
1990 	pi->pi_lintr.ioapic_irq = ii->ii_ioapic_irq;  in pci_lintr_route()
1991 	pi->pi_lintr.pirq_pin = ii->ii_pirq_pin;  in pci_lintr_route()
1999 	assert(pi->pi_lintr.pin > 0);  in pci_lintr_assert()
2001 	pthread_mutex_lock(&pi->pi_lintr.lock);  in pci_lintr_assert()
2002 	if (pi->pi_lintr.state == IDLE) {  in pci_lintr_assert()
2004 			pi->pi_lintr.state = ASSERTED;  in pci_lintr_assert()
2007 			pi->pi_lintr.state = PENDING;  in pci_lintr_assert()
2009 	pthread_mutex_unlock(&pi->pi_lintr.lock);  in pci_lintr_assert()
2016 	assert(pi->pi_lintr.pin > 0);  in pci_lintr_deassert()
2018 	pthread_mutex_lock(&pi->pi_lintr.lock);  in pci_lintr_deassert()
2019 	if (pi->pi_lintr.state == ASSERTED) {  in pci_lintr_deassert()
2020 		pi->pi_lintr.state = IDLE;  in pci_lintr_deassert()
2022 	} else if (pi->pi_lintr.state == PENDING)  in pci_lintr_deassert()
2023 		pi->pi_lintr.state = IDLE;  in pci_lintr_deassert()
2024 	pthread_mutex_unlock(&pi->pi_lintr.lock);  in pci_lintr_deassert()
2031 	pthread_mutex_lock(&pi->pi_lintr.lock);  in pci_lintr_update()
2032 	if (pi->pi_lintr.state == ASSERTED && !pci_lintr_permitted(pi)) {  in pci_lintr_update()
2034 		pi->pi_lintr.state = PENDING;  in pci_lintr_update()
2035 	} else if (pi->pi_lintr.state == PENDING && pci_lintr_permitted(pi)) {  in pci_lintr_update()
2036 		pi->pi_lintr.state = ASSERTED;  in pci_lintr_update()
2039 	pthread_mutex_unlock(&pi->pi_lintr.lock);  in pci_lintr_update()