Lines Matching full:val
18 spr_tcp_state(val("t_state")), in t7_display_tcb_aux_0()
19 val("t_state"), in t7_display_tcb_aux_0()
20 spr_ip_version(val("ip_version")), in t7_display_tcb_aux_0()
21 val("lock_tid"), in t7_display_tcb_aux_0()
22 val("rss_fw") in t7_display_tcb_aux_0()
25 val("l2t_ix"), in t7_display_tcb_aux_0()
26 val("smac_sel"), in t7_display_tcb_aux_0()
27 val("tos") in t7_display_tcb_aux_0()
30 val("t_maxseg"), val("recv_scale"), in t7_display_tcb_aux_0()
31 val("recv_tstmp"), val("recv_sack")); in t7_display_tcb_aux_0()
36 val("timer"), val("dack_timer")); in t7_display_tcb_aux_0()
38 val("mod_schd_tx"), in t7_display_tcb_aux_0()
39 val("mod_schd_rx"), in t7_display_tcb_aux_0()
40 ((val("mod_schd_reason2")<<2) | (val("mod_schd_reason1")<<1) | in t7_display_tcb_aux_0()
41 val("mod_schd_reason0")) in t7_display_tcb_aux_0()
46 val("max_rt"), val("t_rxtshift"), in t7_display_tcb_aux_0()
47 val("keepalive")); in t7_display_tcb_aux_0()
49 val("timestamp_offset"),val("timestamp")); in t7_display_tcb_aux_0()
53 val("t_rtt_ts_recent_age"), val("t_rtseq_recent")); in t7_display_tcb_aux_0()
55 val("t_srtt"),val("t_rttvar")); in t7_display_tcb_aux_0()
64 val("snd_una"),val("snd_nxt"), in t7_display_tcb_aux_0()
65 val("snd_max"),val("tx_max")); in t7_display_tcb_aux_0()
67 val("core_fin"), SEQ_SUB(val("tx_max"),val("snd_una")) in t7_display_tcb_aux_0()
69 if (val("recv_scale") && !val("active_open")) { in t7_display_tcb_aux_0()
71 val("rcv_adv"), val("rcv_scale"), in t7_display_tcb_aux_0()
72 val("rcv_adv") << val("rcv_scale"), in t7_display_tcb_aux_0()
73 val("recv_scale"), val("rcv_scale"), val("active_open")); in t7_display_tcb_aux_0()
76 val("rcv_adv"), val("rcv_scale"), in t7_display_tcb_aux_0()
77 val("recv_scale"), val("active_open")); in t7_display_tcb_aux_0()
81 val("snd_cwnd") , val("snd_ssthresh"), val("snd_rec") in t7_display_tcb_aux_0()
88 spr_cctrl_sel(val("cctrl_sel0"),val("cctrl_sel1")), in t7_display_tcb_aux_0()
89 val("cctrl_ecn"), val("cctrl_ece"), val("cctrl_cwr"), in t7_display_tcb_aux_0()
90 val("cctrl_rfr")); in t7_display_tcb_aux_0()
92 val("t_dupacks"), val("dupack_count_odd"),val("fast_recovery")); in t7_display_tcb_aux_0()
94 val("core_more"),val("core_urg"),val("core_push")); in t7_display_tcb_aux_0()
95 PR(" core_flush %u\n",val("core_flush")); in t7_display_tcb_aux_0()
97 val("nagle"), val("ssws_disabled"), val("turbo")); in t7_display_tcb_aux_0()
98 PR(" tx_pdu_out %u\n",val("tx_pdu_out")); in t7_display_tcb_aux_0()
100 val("tx_pace_auto"),val("tx_pace_fixed"),val("tx_queue")); in t7_display_tcb_aux_0()
103 PR(" tx_quiesce %u\n",val("tx_quiesce")); in t7_display_tcb_aux_0()
105 val("channel"), in t7_display_tcb_aux_0()
106 val("channel_msb") in t7_display_tcb_aux_0()
113 val("tx_hdr_ptr"),val("tx_last_ptr"),val("tx_compact")); in t7_display_tcb_aux_0()
120 val("ts_last_ack_sent"),val("rx_compact")); in t7_display_tcb_aux_0()
122 val("rcv_nxt"), val("rx_hdr_offset")); in t7_display_tcb_aux_0()
124 val("rx_frag0_start_idx"), in t7_display_tcb_aux_0()
125 val("rx_frag0_len"), in t7_display_tcb_aux_0()
126 val("rx_ptr")); in t7_display_tcb_aux_0()
128 val("rx_frag1_start_idx_offset"), in t7_display_tcb_aux_0()
129 val("rx_frag1_len")); in t7_display_tcb_aux_0()
134 …if (val("ulp_type")!=4 && val("ulp_type")!=7) { /* RDMA has FRAG1 idx && len, but no ptr? Should … in t7_display_tcb_aux_0()
135 PR("frag1_ptr 0x%-8x\n",val("rx_frag1_ptr")); in t7_display_tcb_aux_0()
141 if (val("ulp_type") != 9 && val("ulp_type")!=8 && val("ulp_type") !=6 && in t7_display_tcb_aux_0()
142 val("ulp_type") != 5 && val("ulp_type") !=4 && val("ulp_type") !=7) { in t7_display_tcb_aux_0()
144 val("rx_frag2_start_idx_offset"), in t7_display_tcb_aux_0()
145 val("rx_frag2_len"), in t7_display_tcb_aux_0()
146 val("rx_frag2_ptr")); in t7_display_tcb_aux_0()
148 val("rx_frag3_start_idx_offset"), in t7_display_tcb_aux_0()
149 val("rx_frag3_len"), in t7_display_tcb_aux_0()
150 val("rx_frag3_ptr")); in t7_display_tcb_aux_0()
159 val("peer_fin"),val("rx_pdu_out"), val("pdu_len")); in t7_display_tcb_aux_0()
164 if (val("recv_scale")) { in t7_display_tcb_aux_0()
166 val("rcv_wnd"), val("snd_scale"), in t7_display_tcb_aux_0()
167 val("rcv_wnd") >> val("snd_scale"), in t7_display_tcb_aux_0()
168 val("recv_scale")); in t7_display_tcb_aux_0()
171 val("rcv_wnd"), val("snd_scale"), in t7_display_tcb_aux_0()
172 val("recv_scale")); in t7_display_tcb_aux_0()
179 val("dack_mss"),val("dack"),val("dack_not_acked")); in t7_display_tcb_aux_0()
181 val("rcv_coalesce_enable"), in t7_display_tcb_aux_0()
182 val("rcv_coalesce_push"), in t7_display_tcb_aux_0()
183 val("rcv_coalesce_last_psh"), in t7_display_tcb_aux_0()
184 val("rcv_coalesce_heartbeat")); in t7_display_tcb_aux_0()
187 val("rx_quiesce"), in t7_display_tcb_aux_0()
188 val("rx_flow_control_disable")); in t7_display_tcb_aux_0()
190 val("rx_flow_control_ddp")); in t7_display_tcb_aux_0()
195 ((val("pend_ctl2")<<2) | (val("pend_ctl1")<<1) | in t7_display_tcb_aux_0()
196 val("pend_ctl0")), in t7_display_tcb_aux_0()
197 val("core_bypass"),val("main_slush")); in t7_display_tcb_aux_0()
199 val("migrating"), in t7_display_tcb_aux_0()
200 val("ask_mode"), val("non_offload"), val("rss_info")); in t7_display_tcb_aux_0()
202 val("ulp_type"), spr_ulp_type(val("ulp_type")), in t7_display_tcb_aux_0()
203 val("ulp_raw")); in t7_display_tcb_aux_0()
207 PR(", ulp_ext %u",val("ulp_ext")); in t7_display_tcb_aux_0()
215 val("rdma_error"), val("rdma_flm_error")); in t7_display_tcb_aux_0()
225 val("aux1_slush0"), val("aux1_slush1")); in t7_display_tcb_aux_1()
226 PR(" pdu_hdr_len %u\n",val("pdu_hdr_len")); in t7_display_tcb_aux_1()
238 val("qp_id"), val("pd_id"),val("stag")); in t7_display_tcb_aux_2()
240 val("irs_ulp"),val("iss_ulp")); in t7_display_tcb_aux_2()
242 val("tx_pdu_len")); in t7_display_tcb_aux_2()
244 val("cq_idx_sq"),val("cq_idx_rq")); in t7_display_tcb_aux_2()
246 val("rq_start"),val("rq_msn"),val("rq_max_offset"), in t7_display_tcb_aux_2()
247 val("rq_write_ptr")); in t7_display_tcb_aux_2()
249 val("ord_l_bit_vld"),val("rdmap_opcode")); in t7_display_tcb_aux_2()
251 val("tx_flush"),val("tx_oos_rxmt"),val("tx_oos_txmt")); in t7_display_tcb_aux_2()
266 val("aux3_slush"),val("ddp_buf0_unused"),val("ddp_buf1_unused")); in t7_display_tcb_aux_3()
270 val("ddp_indicate_fll"),val("tls_key_mode")); in t7_display_tcb_aux_3()
275 val("ddp_off"),val("ddp_active_buf"),val("ddp_indicate_out"), in t7_display_tcb_aux_3()
276 val("ddp_wait_frag"),val("ddp_rx2tx"),val("ddp_buf_inf") in t7_display_tcb_aux_3()
282 val("ddp_buf0_indicate"), in t7_display_tcb_aux_3()
283 val("ddp_pshf_enable_0"), val("ddp_push_disable_0"), in t7_display_tcb_aux_3()
284 val("ddp_buf0_flush"), val("ddp_psh_no_invalidate0") in t7_display_tcb_aux_3()
287 val("ddp_buf1_indicate"), in t7_display_tcb_aux_3()
288 val("ddp_pshf_enable_1"), val("ddp_push_disable_1"), in t7_display_tcb_aux_3()
289 val("ddp_buf1_flush"), val("ddp_psh_no_invalidate1") in t7_display_tcb_aux_3()
303 val("ddp_buf0_valid"),val("rx_ddp_buf0_offset"), in t7_display_tcb_aux_3()
304 val("rx_ddp_buf0_len"),val("rx_ddp_buf0_tag") in t7_display_tcb_aux_3()
308 if (0==val("ddp_off") && 1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) { in t7_display_tcb_aux_3()
316 val("ddp_buf1_valid"),val("rx_ddp_buf1_offset"), in t7_display_tcb_aux_3()
317 val("rx_ddp_buf1_len"),val("rx_ddp_buf1_tag") in t7_display_tcb_aux_3()
323 if (0==val("ddp_off") && 1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { in t7_display_tcb_aux_3()
334 if (1==val("ddp_off")) { in t7_display_tcb_aux_3()
336 } else if (1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) { in t7_display_tcb_aux_3()
339 val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"), in t7_display_tcb_aux_3()
340 val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset") in t7_display_tcb_aux_3()
342 if (1==val("ddp_buf1_valid")) { in t7_display_tcb_aux_3()
344 val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"), in t7_display_tcb_aux_3()
345 val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset") in t7_display_tcb_aux_3()
348 } else if (1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { in t7_display_tcb_aux_3()
351 val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"), in t7_display_tcb_aux_3()
352 val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset") in t7_display_tcb_aux_3()
354 if (1==val("ddp_buf0_valid")) { in t7_display_tcb_aux_3()
356 val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"), in t7_display_tcb_aux_3()
357 val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset") in t7_display_tcb_aux_3()
360 } else if (0==val("ddp_buf0_valid") && 1==val("ddp_buf1_valid") && 0==val("ddp_active_buf")) { in t7_display_tcb_aux_3()
362 } else if (1==val("ddp_buf0_valid") && 0==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { in t7_display_tcb_aux_3()
370 if (0==val("ddp_indicate_out")) { in t7_display_tcb_aux_3()
371 if (0==val("ddp_buf0_indicate") && 0==val("ddp_buf1_indicate")) { in t7_display_tcb_aux_3()
373 if (0==val("rx_hdr_offset")) { in t7_display_tcb_aux_3()
377 val("rx_hdr_offset")); in t7_display_tcb_aux_3()
382 } else if (1==val("ddp_indicate_out")) { in t7_display_tcb_aux_3()
384 if (0==val("rx_hdr_offset")) { in t7_display_tcb_aux_3()
388 val("rx_hdr_offset")); in t7_display_tcb_aux_3()
403 val("rx_tls_buf_offset"),val("rx_tls_buf_len"), in t7_display_tcb_aux_4()
404 val("rx_tls_flags")); in t7_display_tcb_aux_4()
407 val("rx_tls_buf_tag"),val("rx_tls_key_tag")); in t7_display_tcb_aux_4()