Lines Matching +full:low +full:- +full:precision
3 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
45 * machine-independent).
49 * - sign
50 * - unbiased exponent
51 * - mantissa (`1.' + 112-bit fraction + guard + round)
52 * - sticky bit
53 * Any implied `1' bit is inserted, giving a 113-bit mantissa that is
54 * always nonzero. Additional low-order `guard' and `round' bits are
56 * into four 32-bit words, with `spare' bits left over in the upper part
58 * number is thus kept within the half-open interval [1.0,2.0) (but see
60 * when we explode an external denorm, we normalize it, introducing low-order
64 * The most demanding algorithm---the one for sqrt---depends on two such
68 * The sticky-word is 32 bits so that we can use `OR' operators to goosh
71 * All operations are done in this internal extended precision. According
72 * to Hennesey & Patterson, Appendix A, rounding can be repeated---that is,
73 * it is OK to do a+b in extended precision and then round the result to
74 * single precision---provided single, double, and extended precisions are
83 u_int fp_mant[4]; /* 115-bit mantissa */
87 #define FP_NG 2 /* number of low-order guard bits */
88 #define FP_LG ((FP_NMANT - 1) & 31) /* log2(1.0) for fp_mant[0] */
89 #define FP_LG2 ((FP_NMANT - 1) & 63) /* log2(1.0) for fp_mant[0] and fp_mant[1] */
90 #define FP_QUIETBIT (1 << (FP_LG - 1)) /* Quiet bit in NaNs (0.5) */
100 #define FPC_SNAN -2 /* signalling NaN (sign irrelevant) */
101 #define FPC_QNAN -1 /* quiet NaN (sign irrelevant) */
106 #define ISSNAN(fp) ((fp)->fp_class == FPC_SNAN)
107 #define ISQNAN(fp) ((fp)->fp_class == FPC_QNAN)
108 #define ISNAN(fp) ((fp)->fp_class < 0)
109 #define ISZERO(fp) ((fp)->fp_class == 0)
110 #define ISINF(fp) ((fp)->fp_class == FPC_INF)
128 if ((u_int)(x)->fp_class > (u_int)(y)->fp_class) \
154 #define fpu_sub(fe) ((fe)->fe_f2.fp_sign ^= 1, fpu_add(fe))
173 * Note that the result is probably not a well-formed number (it will lack
174 * the normal 1-bit mant[0]&FP_1).