Lines Matching +full:low +full:- +full:precision

1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013 George V. Neville-Neil
30 * The following set of constants are from Document SFF-8472
40 * 0-95 Serial ID Defined by SFP MSA
41 * 96-127 Vendor Specific Data
42 * 128-255 Reserved
45 * 0-55 Alarm and Warning Thresholds
46 * 56-95 Cal Constants
47 * 96-119 Real Time Diagnostic Interface
48 * 120-127 Vendor Specific
49 * 128-247 User Writable EEPROM
50 * 248-255 Vendor Specific
62 /* Table 3.1 Two-wire interface ID: Data Fields */
95 * 20-35] */
128 SFF_8472_SN_START = 68, /* Vendor SN [Address A0h, Bytes 68-83] */
144 SFF_8472_COMPLIANCE = 94, /* SFF-8472 Compliance Indicates
145 * which revision of SFF-8472 the
164 * See SFF-8472 doc. */
181 SFF_8472_TEMP_LOW_ALM = 2, /* Temp Low Alarm */
183 SFF_8472_TEMP_LOW_WARN = 6, /* Temp Low Warning */
185 SFF_8472_VOLTAGE_LOW_ALM = 10, /* Voltage Low Alarm */
187 SFF_8472_VOLTAGE_LOW_WARN = 14, /* Voltage Low Warning */
189 SFF_8472_BIAS_LOW_ALM = 18, /* Bias Low Alarm */
191 SFF_8472_BIAS_LOW_WARN = 22, /* Bias Low Warning */
193 SFF_8472_TX_POWER_LOW_ALM = 26, /* TX Power Low Alarm */
195 SFF_8472_TX_POWER_LOW_WARN = 30, /* TX Power Low Warning */
197 SFF_8472_RX_POWER_LOW_ALM = 34, /* RX Power Low Alarm */
199 SFF_8472_RX_POWER_LOW_WARN = 38, /* RX Power Low Warning */
201 SFF_8472_RX_POWER4 = 56, /* Rx_PWR(4) Single precision
203 * - Rx optical power. Bit 7 of
208 SFF_8472_RX_POWER3 = 60, /* Rx_PWR(3) Single precision
210 * - Rx optical power. Bit 7 of
215 SFF_8472_RX_POWER2 = 64, /* Rx_PWR(2) Single precision
222 SFF_8472_RX_POWER1 = 68, /* Rx_PWR(1) Single precision
229 SFF_8472_RX_POWER0 = 72, /* Rx_PWR(0) Single precision
299 * low order 8 bits of the sum of
326 * enabled unless pulled low by hardware. If Soft TX Disable is not
328 * power up value is zero/low.
333 * RS(1) State Digital state of SFP input pin AS(1) per SFF-8079 or
334 * RS(1) per SFF-8431. Updated within 100ms of change on pin. See A2h
342 * This pin is also known as AS(0) in SFF-8079 and RS(0) in SFF-8431.
350 * timing requirements. Default at power up is logic zero/low. If Soft
373 * device sets the bit low.
379 * Identifier constants has taken from SFF-8024 rev 4.6 table 4.1
391 SFF_8024_ID_XFPE = 0x8, /* XFP-E */
394 SFF_8024_ID_DWDM_SFP = 0xB, /* DWDM-SFP */
407 SFF_8024_ID_QSFP_DD = 0x18, /* QSFP-DD 8X Pluggable Transceiver */
409 SFF_8024_ID_SFP_DD = 0x1A, /* SFP-DD 2X Pluggable Transceiver */
427 "XFP-E",
430 "DWDM-SFP/SFP+",
443 "QSFP-DD",
445 "SFP-DD",
523 * yielding a total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm).