Lines Matching +full:4 +full:- +full:ring
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2011-2013 Qlogic Corporation
44 * Command Response Interface - Commands
77 * Command Response Interface - Response
103 * Transmit Context - Q8_CMD_CREATE_TX_CNTXT Command Configuration Data
111 uint32_t caps[4]; /* capabilities - bit vector*/
123 uint64_t phys_addr; /* physical address of transmit ring
125 uint32_t num_entries; /* number of entries in transmit ring */
130 * Transmit Context - Response from Firmware to Q8_CMD_CREATE_TX_CNTXT
142 uint32_t producer_reg; /* producer register for transmit ring */
149 * These commands are issued on the Transmit Ring associated with a Transmit
155 uint16_t flags_opcode; /* Bits 0-6: flags; 7-12: opcode */
180 uint8_t port_cntxtid; /* Bits 7-4: ContextId; 3-0: reserved */
182 #define Q8_TX_CMD_PORT_CNXTID(c_id) ((c_id & 0xF) << 4)
193 uint16_t buf4_len; /* length of buffer 4 */
195 uint64_t buf4_addr; /* buffer 4 address */
203 #define Q8_TX_CMD_MAX_SEGMENTS 4
211 * Receive Context - Q8_CMD_CREATE_RX_CNTXT Command Configuration Data
215 uint64_t phys_addr; /* physical addr of status ring in system memory */
216 uint32_t size; /* number of entries in status ring */
222 uint64_t phys_addr; /* physical addr of rcv ring in system memory */
224 uint32_t size; /* number of entries in ring */
230 uint32_t caps[4]; /* bit vector */
245 } __packed q80_rq_rcv_cntxt_t; /* 176 bytes header + rds + sds ring rqsts */
248 * Receive Context - Response from Firmware to Q8_CMD_CREATE_RX_CNTXT
278 } __packed q80_rsp_rcv_cntxt_t; /* 152 bytes header + rds + sds ring rspncs */
288 * 3 RDS and 4 SDS rings: (((16+24)*3)+176) + (((8+8)*4)+152) =
291 * (typically 4Kbytes). Hence it is simpler to simply allocate one PAGE
294 * ring in this PAGE.
298 * Receive Descriptor corresponding to each entry in the receive ring
308 * Status Descriptor corresponding to each entry in the Status ring
335 #define Q8_STAT_DESC_STATUS(data) ((data >> 4) & 0x000F)
348 * definitions for data[0-1] fields of Status Descriptor for LRO
366 #define MAX_SDS_RINGS 4 /* Max# of Status Descriptor Rings */
450 #define Q8_FWCD_RSS_HASH_TYPE_IPV4_TCP (0x2 << 4)
451 #define Q8_FWCD_RSS_HASH_TYPE_IPV4_IP (0x1 << 4)
452 #define Q8_FWCD_RSS_HASH_TYPE_IPV4_TCP_IP (0x3 << 4)
460 uint8_t rsrvd[4];
591 uint8_t pad[4];
618 * Control Messages Received on SDS Ring
711 q80_stat_desc_t *sds_ring_base; /* start of sds ring */
712 uint32_t sdsr_next; /* next entry in SDS ring to process */
771 volatile uint32_t txr_free; /* # of free entries in tx ring */
772 volatile uint32_t txr_next; /* # next available tx ring entry */
778 volatile uint32_t rx_next; /* next standard rcv ring to arm fw */
779 volatile int32_t rxj_next; /* next jumbo rcv ring to arm fw */
781 volatile int32_t rx_in; /* next standard rcv ring to add mbufs */
782 volatile int32_t rxj_in; /* next jumbo rcv ring to add mbufs */
795 WRITE_REG32(ha, ((ha->hw.rx_cntxt_rsp)->rds_rsp[i].producer_reg +\
799 WRITE_REG32(ha, (ha->hw.tx_prod_reg + 0x1b2000), val)
802 WRITE_REG32(ha, ((ha->hw.rx_cntxt_rsp)->sds_rsp[i].consumer_reg +\
806 if (ha->pci_func == 0) {\
815 rsp_sds = &((ha->hw.rx_cntxt_rsp)->sds_rsp[sds_index]);\
816 WRITE_REG32(ha, (rsp_sds->intr_mask_reg + 0x1b2000), 0x1);\
822 rsp_sds = &((ha->hw.rx_cntxt_rsp)->sds_rsp[sds_index]);\
823 WRITE_REG32(ha, (rsp_sds->intr_mask_reg + 0x1b2000), 0x0);\