Lines Matching full:tbus
12100 …N_K2_E5 (0x1<<7) // Clock gate enable for the TBUS debug output branch…
12112 …G_EN_K2_E5 (0x1<<7) // Clock gate enable for the TBUS debug output branch…
12140 …N_K2_E5 (0x1<<7) // Clock gate enable for the TBUS debug output branch…
12152 …G_EN_K2_E5 (0x1<<7) // Clock gate enable for the TBUS debug output branch…
12164 …N_K2_E5 (0x1<<7) // Clock gate enable for the TBUS debug output branch…
12176 …G_EN_K2_E5 (0x1<<7) // Clock gate enable for the TBUS debug output branch…
12383 …cess:RW DataWidth:0x8 // lower 8-bits of the 16-bit digital test bus tbus address. Decoding t…
12384 …ess:RW DataWidth:0x8 // higher 8-bits of the 16-bit digital test bus tbus address. Decoding t…
12388 … 0x0006c0UL //Access:R DataWidth:0x8 // Digital test bus tbus output bits [7:0]
12390 … (0xf<<0) // Digital test bus tbus output bits [11:8]
28634 …0_K2_E5 (0x7<<0) // Selects which comparator offsets come out on tbus
35966 …_K2_E5 (0x7<<0) // Selects which comparator offsets come out on tbus