Lines Matching +full:clear +full:- +full:mask
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #define MS_INS_MASK 0x00ff /* mask to retrieve the instruction position < 256 XXX */
38 #define MS_ARG_MASK 0x0f00 /* mask to retrieve the argument number */
39 #define MS_TYP_MASK 0xf000 /* mask to retrieve the type of the param */
41 /* offset of each mask (see above) */
61 /* microsequence opcodes - do not change! */
65 #define MS_OP_RFETCH 2 /* rfetch <reg>, <mask>, <ptr> */
66 #define MS_OP_RSET 3 /* rset <reg>, <mask>, <mask> */
67 #define MS_OP_RASSERT 4 /* rassert <reg>, <mask> */
71 #define MS_OP_BRSET 8 /* brset <mask>, <offset> */
72 #define MS_OP_BRCLEAR 9 /* brclear <mask>, <offset> */
77 #define MS_OP_BRSTAT 14 /* brstat <mask>, <mask>, <offset> */
81 #define MS_OP_RFETCH_P 18 /* rfetch_p <iter>, <reg>, <mask> */
95 #define MS_ACCUM -1 /* use accum previously set by MS_OP_SET */
97 /* these are register numbers according to our PC-like parallel port model */
109 #define MS_RSET(reg,assert,clear) { MS_OP_RSET, {{ (reg) }, { (assert) }, { (clear) }}} argument
111 #define MS_RCLR(reg,clear) { MS_OP_RSET, {{ (reg) }, { MS_ASSERT_NONE }, { (clear) }}} argument
112 #define MS_RFETCH(reg,mask,ptr) { MS_OP_RFETCH, {{ (reg) }, { (mask) }, { (ptr) }}} argument
119 #define MS_RFETCH_P(n,reg,mask) { MS_OP_RFETCH_P, {{ (n) }, { (reg) }, { (mask) }}} argument
128 #define MS_BRSET(mask,offset) { MS_OP_BRSET, {{ (mask) }, { (offset) }}} argument
130 #define MS_BRCLEAR(mask,offset) { MS_OP_BRCLEAR, {{ (mask) }, { (offset) }}} argument