Lines Matching +full:dma +full:- +full:info
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
154 * commands. So we can't use strict timeouts described in PRM -- we
193 return readl(dev->hcr + HCR_STATUS_OFFSET) & in go_bit()
205 void __iomem *ptr = dev->cmd.dbell_map; in mthca_cmd_post_dbell()
206 u16 *offs = dev->cmd.dbell_offsets; in mthca_cmd_post_dbell()
248 return -EAGAIN; in mthca_cmd_post_hcr()
256 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); in mthca_cmd_post_hcr()
257 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); in mthca_cmd_post_hcr()
258 __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4); in mthca_cmd_post_hcr()
259 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4); in mthca_cmd_post_hcr()
260 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4); in mthca_cmd_post_hcr()
261 __raw_writel((__force u32) cpu_to_be32(token << 16), dev->hcr + 5 * 4); in mthca_cmd_post_hcr()
269 op), dev->hcr + 6 * 4); in mthca_cmd_post_hcr()
285 mutex_lock(&dev->cmd.hcr_mutex); in mthca_cmd_post()
287 if (event && dev->cmd.flags & MTHCA_CMD_POST_DOORBELLS && fw_cmd_doorbell) in mthca_cmd_post()
300 mutex_unlock(&dev->cmd.hcr_mutex); in mthca_cmd_post()
307 [MTHCA_CMD_STAT_INTERNAL_ERR] = -EIO, in mthca_status_to_errno()
308 [MTHCA_CMD_STAT_BAD_OP] = -EPERM, in mthca_status_to_errno()
309 [MTHCA_CMD_STAT_BAD_PARAM] = -EINVAL, in mthca_status_to_errno()
310 [MTHCA_CMD_STAT_BAD_SYS_STATE] = -ENXIO, in mthca_status_to_errno()
311 [MTHCA_CMD_STAT_BAD_RESOURCE] = -EBADF, in mthca_status_to_errno()
312 [MTHCA_CMD_STAT_RESOURCE_BUSY] = -EBUSY, in mthca_status_to_errno()
313 [MTHCA_CMD_STAT_DDR_MEM_ERR] = -ENOMEM, in mthca_status_to_errno()
314 [MTHCA_CMD_STAT_EXCEED_LIM] = -ENOMEM, in mthca_status_to_errno()
315 [MTHCA_CMD_STAT_BAD_RES_STATE] = -EBADF, in mthca_status_to_errno()
316 [MTHCA_CMD_STAT_BAD_INDEX] = -EBADF, in mthca_status_to_errno()
317 [MTHCA_CMD_STAT_BAD_NVMEM] = -EFAULT, in mthca_status_to_errno()
318 [MTHCA_CMD_STAT_BAD_QPEE_STATE] = -EINVAL, in mthca_status_to_errno()
319 [MTHCA_CMD_STAT_BAD_SEG_PARAM] = -EFAULT, in mthca_status_to_errno()
320 [MTHCA_CMD_STAT_REG_BOUND] = -EBUSY, in mthca_status_to_errno()
321 [MTHCA_CMD_STAT_LAM_NOT_PRE] = -EAGAIN, in mthca_status_to_errno()
322 [MTHCA_CMD_STAT_BAD_PKT] = -EBADMSG, in mthca_status_to_errno()
323 [MTHCA_CMD_STAT_BAD_SIZE] = -ENOMEM, in mthca_status_to_errno()
329 return -EINVAL; in mthca_status_to_errno()
347 down(&dev->cmd.poll_sem); in mthca_cmd_poll()
363 err = -EBUSY; in mthca_cmd_poll()
370 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET)) << 32 | in mthca_cmd_poll()
372 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4)); in mthca_cmd_poll()
374 status = be32_to_cpu((__force __be32) __raw_readl(dev->hcr + HCR_STATUS_OFFSET)) >> 24; in mthca_cmd_poll()
382 up(&dev->cmd.poll_sem); in mthca_cmd_poll()
392 &dev->cmd.context[token & dev->cmd.token_mask]; in mthca_cmd_event()
395 if (token != context->token) in mthca_cmd_event()
398 context->result = 0; in mthca_cmd_event()
399 context->status = status; in mthca_cmd_event()
400 context->out_param = out_param; in mthca_cmd_event()
402 complete(&context->done); in mthca_cmd_event()
417 down(&dev->cmd.event_sem); in mthca_cmd_wait()
419 spin_lock(&dev->cmd.context_lock); in mthca_cmd_wait()
420 BUG_ON(dev->cmd.free_head < 0); in mthca_cmd_wait()
421 context = &dev->cmd.context[dev->cmd.free_head]; in mthca_cmd_wait()
422 context->token += dev->cmd.token_mask + 1; in mthca_cmd_wait()
423 dev->cmd.free_head = context->next; in mthca_cmd_wait()
424 spin_unlock(&dev->cmd.context_lock); in mthca_cmd_wait()
426 init_completion(&context->done); in mthca_cmd_wait()
431 op, context->token, 1); in mthca_cmd_wait()
435 if (!wait_for_completion_timeout(&context->done, timeout)) { in mthca_cmd_wait()
436 err = -EBUSY; in mthca_cmd_wait()
440 err = context->result; in mthca_cmd_wait()
444 if (context->status) { in mthca_cmd_wait()
446 op, context->status); in mthca_cmd_wait()
447 err = mthca_status_to_errno(context->status); in mthca_cmd_wait()
451 *out_param = context->out_param; in mthca_cmd_wait()
454 spin_lock(&dev->cmd.context_lock); in mthca_cmd_wait()
455 context->next = dev->cmd.free_head; in mthca_cmd_wait()
456 dev->cmd.free_head = context - dev->cmd.context; in mthca_cmd_wait()
457 spin_unlock(&dev->cmd.context_lock); in mthca_cmd_wait()
459 up(&dev->cmd.event_sem); in mthca_cmd_wait()
472 if (dev->cmd.flags & MTHCA_CMD_USE_EVENTS) in mthca_cmd_box()
507 if (dev->cmd.flags & MTHCA_CMD_USE_EVENTS) in mthca_cmd_imm()
519 mutex_init(&dev->cmd.hcr_mutex); in mthca_cmd_init()
520 sema_init(&dev->cmd.poll_sem, 1); in mthca_cmd_init()
521 dev->cmd.flags = 0; in mthca_cmd_init()
523 dev->hcr = ioremap(pci_resource_start(dev->pdev, 0) + MTHCA_HCR_BASE, in mthca_cmd_init()
525 if (!dev->hcr) { in mthca_cmd_init()
527 return -ENOMEM; in mthca_cmd_init()
530 dev->cmd.pool = pci_pool_create("mthca_cmd", dev->pdev, in mthca_cmd_init()
533 if (!dev->cmd.pool) { in mthca_cmd_init()
534 iounmap(dev->hcr); in mthca_cmd_init()
535 return -ENOMEM; in mthca_cmd_init()
543 pci_pool_destroy(dev->cmd.pool); in mthca_cmd_cleanup()
544 iounmap(dev->hcr); in mthca_cmd_cleanup()
545 if (dev->cmd.flags & MTHCA_CMD_POST_DOORBELLS) in mthca_cmd_cleanup()
546 iounmap(dev->cmd.dbell_map); in mthca_cmd_cleanup()
557 dev->cmd.context = kmalloc(dev->cmd.max_cmds * in mthca_cmd_use_events()
560 if (!dev->cmd.context) in mthca_cmd_use_events()
561 return -ENOMEM; in mthca_cmd_use_events()
563 for (i = 0; i < dev->cmd.max_cmds; ++i) { in mthca_cmd_use_events()
564 dev->cmd.context[i].token = i; in mthca_cmd_use_events()
565 dev->cmd.context[i].next = i + 1; in mthca_cmd_use_events()
568 dev->cmd.context[dev->cmd.max_cmds - 1].next = -1; in mthca_cmd_use_events()
569 dev->cmd.free_head = 0; in mthca_cmd_use_events()
571 sema_init(&dev->cmd.event_sem, dev->cmd.max_cmds); in mthca_cmd_use_events()
572 spin_lock_init(&dev->cmd.context_lock); in mthca_cmd_use_events()
574 for (dev->cmd.token_mask = 1; in mthca_cmd_use_events()
575 dev->cmd.token_mask < dev->cmd.max_cmds; in mthca_cmd_use_events()
576 dev->cmd.token_mask <<= 1) in mthca_cmd_use_events()
578 --dev->cmd.token_mask; in mthca_cmd_use_events()
580 dev->cmd.flags |= MTHCA_CMD_USE_EVENTS; in mthca_cmd_use_events()
582 down(&dev->cmd.poll_sem); in mthca_cmd_use_events()
594 dev->cmd.flags &= ~MTHCA_CMD_USE_EVENTS; in mthca_cmd_use_polling()
596 for (i = 0; i < dev->cmd.max_cmds; ++i) in mthca_cmd_use_polling()
597 down(&dev->cmd.event_sem); in mthca_cmd_use_polling()
599 kfree(dev->cmd.context); in mthca_cmd_use_polling()
601 up(&dev->cmd.poll_sem); in mthca_cmd_use_polling()
611 return ERR_PTR(-ENOMEM); in mthca_alloc_mailbox()
613 mailbox->buf = pci_pool_alloc(dev->cmd.pool, gfp_mask, &mailbox->dma); in mthca_alloc_mailbox()
614 if (!mailbox->buf) { in mthca_alloc_mailbox()
616 return ERR_PTR(-ENOMEM); in mthca_alloc_mailbox()
627 pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma); in mthca_free_mailbox()
638 if (ret == -ENOMEM) in mthca_SYS_EN()
669 memset(mailbox->buf, 0, MTHCA_MAILBOX_SIZE); in mthca_map_cmd()
670 pages = mailbox->buf; in mthca_map_cmd()
680 lg = ffs(mthca_icm_addr(&iter) | mthca_icm_size(&iter)) - 1; in mthca_map_cmd()
686 err = -EINVAL; in mthca_map_cmd()
690 if (virt != -1) { in mthca_map_cmd()
697 (lg - MTHCA_ICM_PAGE_SHIFT)); in mthca_map_cmd()
699 ts += 1 << (lg - 10); in mthca_map_cmd()
704 err = mthca_cmd(dev, mailbox->dma, nent, 0, op, in mthca_map_cmd()
714 err = mthca_cmd(dev, mailbox->dma, nent, 0, op, in mthca_map_cmd()
726 tc, ts, (unsigned long long) virt - (ts << 10)); in mthca_map_cmd()
737 return mthca_map_cmd(dev, CMD_MAP_FA, icm, -1); in mthca_MAP_FA()
757 max_off = max(max_off, dev->cmd.dbell_offsets[i]); in mthca_setup_cmd_doorbells()
766 addr = pci_resource_start(dev->pdev, 2) + in mthca_setup_cmd_doorbells()
767 ((pci_resource_len(dev->pdev, 2) - 1) & base); in mthca_setup_cmd_doorbells()
768 dev->cmd.dbell_map = ioremap(addr, max_off + sizeof(u32)); in mthca_setup_cmd_doorbells()
769 if (!dev->cmd.dbell_map) in mthca_setup_cmd_doorbells()
772 dev->cmd.flags |= MTHCA_CMD_POST_DOORBELLS; in mthca_setup_cmd_doorbells()
807 outbox = mailbox->buf; in mthca_QUERY_FW()
809 err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_FW, in mthca_QUERY_FW()
815 MTHCA_GET(dev->fw_ver, outbox, QUERY_FW_VER_OFFSET); in mthca_QUERY_FW()
820 dev->fw_ver = (dev->fw_ver & 0xffff00000000ull) | in mthca_QUERY_FW()
821 ((dev->fw_ver & 0xffff0000ull) >> 16) | in mthca_QUERY_FW()
822 ((dev->fw_ver & 0x0000ffffull) << 16); in mthca_QUERY_FW()
825 dev->cmd.max_cmds = 1 << lg; in mthca_QUERY_FW()
828 (unsigned long long) dev->fw_ver, dev->cmd.max_cmds); in mthca_QUERY_FW()
830 MTHCA_GET(dev->catas_err.addr, outbox, QUERY_FW_ERR_START_OFFSET); in mthca_QUERY_FW()
831 MTHCA_GET(dev->catas_err.size, outbox, QUERY_FW_ERR_SIZE_OFFSET); in mthca_QUERY_FW()
834 (unsigned long long) dev->catas_err.addr, dev->catas_err.size); in mthca_QUERY_FW()
842 MTHCA_GET(dev->cmd.dbell_offsets[i], outbox, in mthca_QUERY_FW()
849 MTHCA_GET(dev->fw.arbel.fw_pages, outbox, QUERY_FW_SIZE_OFFSET); in mthca_QUERY_FW()
850 MTHCA_GET(dev->fw.arbel.clr_int_base, outbox, QUERY_FW_CLR_INT_BASE_OFFSET); in mthca_QUERY_FW()
851 MTHCA_GET(dev->fw.arbel.eq_arm_base, outbox, QUERY_FW_EQ_ARM_BASE_OFFSET); in mthca_QUERY_FW()
852 MTHCA_GET(dev->fw.arbel.eq_set_ci_base, outbox, QUERY_FW_EQ_SET_CI_BASE_OFFSET); in mthca_QUERY_FW()
853 mthca_dbg(dev, "FW size %d KB\n", dev->fw.arbel.fw_pages << 2); in mthca_QUERY_FW()
860 dev->fw.arbel.fw_pages = in mthca_QUERY_FW()
861 ALIGN(dev->fw.arbel.fw_pages, PAGE_SIZE / MTHCA_ICM_PAGE_SIZE) >> in mthca_QUERY_FW()
862 (PAGE_SHIFT - MTHCA_ICM_PAGE_SHIFT); in mthca_QUERY_FW()
866 (unsigned long long) dev->fw.arbel.clr_int_base, in mthca_QUERY_FW()
867 (unsigned long long) dev->fw.arbel.eq_arm_base, in mthca_QUERY_FW()
868 (unsigned long long) dev->fw.arbel.eq_set_ci_base); in mthca_QUERY_FW()
870 MTHCA_GET(dev->fw.tavor.fw_start, outbox, QUERY_FW_START_OFFSET); in mthca_QUERY_FW()
871 MTHCA_GET(dev->fw.tavor.fw_end, outbox, QUERY_FW_END_OFFSET); in mthca_QUERY_FW()
874 (int) ((dev->fw.tavor.fw_end - dev->fw.tavor.fw_start) >> 10), in mthca_QUERY_FW()
875 (unsigned long long) dev->fw.tavor.fw_start, in mthca_QUERY_FW()
876 (unsigned long long) dev->fw.tavor.fw_end); in mthca_QUERY_FW()
887 u8 info; in mthca_ENABLE_LAM() local
902 outbox = mailbox->buf; in mthca_ENABLE_LAM()
904 err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_ENABLE_LAM, in mthca_ENABLE_LAM()
910 MTHCA_GET(dev->ddr_start, outbox, ENABLE_LAM_START_OFFSET); in mthca_ENABLE_LAM()
911 MTHCA_GET(dev->ddr_end, outbox, ENABLE_LAM_END_OFFSET); in mthca_ENABLE_LAM()
912 MTHCA_GET(info, outbox, ENABLE_LAM_INFO_OFFSET); in mthca_ENABLE_LAM()
914 if (!!(info & ENABLE_LAM_INFO_HIDDEN_FLAG) != in mthca_ENABLE_LAM()
915 !!(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) { in mthca_ENABLE_LAM()
916 mthca_info(dev, "FW reports that HCA-attached memory " in mthca_ENABLE_LAM()
918 (info & ENABLE_LAM_INFO_HIDDEN_FLAG) ? in mthca_ENABLE_LAM()
921 if (info & ENABLE_LAM_INFO_HIDDEN_FLAG) in mthca_ENABLE_LAM()
922 mthca_dbg(dev, "HCA-attached memory is hidden.\n"); in mthca_ENABLE_LAM()
925 (int) ((dev->ddr_end - dev->ddr_start) >> 10), in mthca_ENABLE_LAM()
926 (unsigned long long) dev->ddr_start, in mthca_ENABLE_LAM()
927 (unsigned long long) dev->ddr_end); in mthca_ENABLE_LAM()
942 u8 info; in mthca_QUERY_DDR() local
957 outbox = mailbox->buf; in mthca_QUERY_DDR()
959 err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_DDR, in mthca_QUERY_DDR()
965 MTHCA_GET(dev->ddr_start, outbox, QUERY_DDR_START_OFFSET); in mthca_QUERY_DDR()
966 MTHCA_GET(dev->ddr_end, outbox, QUERY_DDR_END_OFFSET); in mthca_QUERY_DDR()
967 MTHCA_GET(info, outbox, QUERY_DDR_INFO_OFFSET); in mthca_QUERY_DDR()
969 if (!!(info & QUERY_DDR_INFO_HIDDEN_FLAG) != in mthca_QUERY_DDR()
970 !!(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) { in mthca_QUERY_DDR()
971 mthca_info(dev, "FW reports that HCA-attached memory " in mthca_QUERY_DDR()
973 (info & QUERY_DDR_INFO_HIDDEN_FLAG) ? in mthca_QUERY_DDR()
976 if (info & QUERY_DDR_INFO_HIDDEN_FLAG) in mthca_QUERY_DDR()
977 mthca_dbg(dev, "HCA-attached memory is hidden.\n"); in mthca_QUERY_DDR()
980 (int) ((dev->ddr_end - dev->ddr_start) >> 10), in mthca_QUERY_DDR()
981 (unsigned long long) dev->ddr_start, in mthca_QUERY_DDR()
982 (unsigned long long) dev->ddr_end); in mthca_QUERY_DDR()
1063 outbox = mailbox->buf; in mthca_QUERY_DEV_LIM()
1065 err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_DEV_LIM, in mthca_QUERY_DEV_LIM()
1072 dev_lim->reserved_qps = 1 << (field & 0xf); in mthca_QUERY_DEV_LIM()
1074 dev_lim->max_qps = 1 << (field & 0x1f); in mthca_QUERY_DEV_LIM()
1076 dev_lim->reserved_srqs = 1 << (field >> 4); in mthca_QUERY_DEV_LIM()
1078 dev_lim->max_srqs = 1 << (field & 0x1f); in mthca_QUERY_DEV_LIM()
1080 dev_lim->reserved_eecs = 1 << (field & 0xf); in mthca_QUERY_DEV_LIM()
1082 dev_lim->max_eecs = 1 << (field & 0x1f); in mthca_QUERY_DEV_LIM()
1084 dev_lim->max_cq_sz = 1 << field; in mthca_QUERY_DEV_LIM()
1086 dev_lim->reserved_cqs = 1 << (field & 0xf); in mthca_QUERY_DEV_LIM()
1088 dev_lim->max_cqs = 1 << (field & 0x1f); in mthca_QUERY_DEV_LIM()
1090 dev_lim->max_mpts = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1092 dev_lim->reserved_eqs = 1 << (field & 0xf); in mthca_QUERY_DEV_LIM()
1094 dev_lim->max_eqs = 1 << (field & 0x7); in mthca_QUERY_DEV_LIM()
1097 dev_lim->reserved_mtts = ALIGN((1 << (field >> 4)) * sizeof(u64), in mthca_QUERY_DEV_LIM()
1098 dev->limits.mtt_seg_size) / dev->limits.mtt_seg_size; in mthca_QUERY_DEV_LIM()
1100 dev_lim->reserved_mtts = 1 << (field >> 4); in mthca_QUERY_DEV_LIM()
1102 dev_lim->max_mrw_sz = 1 << field; in mthca_QUERY_DEV_LIM()
1104 dev_lim->reserved_mrws = 1 << (field & 0xf); in mthca_QUERY_DEV_LIM()
1106 dev_lim->max_mtt_seg = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1108 dev_lim->max_requester_per_qp = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1110 dev_lim->max_responder_per_qp = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1112 dev_lim->max_rdma_global = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1114 dev_lim->local_ca_ack_delay = field & 0x1f; in mthca_QUERY_DEV_LIM()
1116 dev_lim->max_mtu = field >> 4; in mthca_QUERY_DEV_LIM()
1117 dev_lim->max_port_width = field & 0xf; in mthca_QUERY_DEV_LIM()
1119 dev_lim->max_vl = field >> 4; in mthca_QUERY_DEV_LIM()
1120 dev_lim->num_ports = field & 0xf; in mthca_QUERY_DEV_LIM()
1122 dev_lim->max_gids = 1 << (field & 0xf); in mthca_QUERY_DEV_LIM()
1124 dev_lim->stat_rate_support = stat_rate; in mthca_QUERY_DEV_LIM()
1126 dev_lim->max_pkeys = 1 << (field & 0xf); in mthca_QUERY_DEV_LIM()
1127 MTHCA_GET(dev_lim->flags, outbox, QUERY_DEV_LIM_FLAGS_OFFSET); in mthca_QUERY_DEV_LIM()
1129 dev_lim->reserved_uars = field >> 4; in mthca_QUERY_DEV_LIM()
1131 dev_lim->uar_size = 1 << ((field & 0x3f) + 20); in mthca_QUERY_DEV_LIM()
1133 dev_lim->min_page_sz = 1 << field; in mthca_QUERY_DEV_LIM()
1135 dev_lim->max_sg = field; in mthca_QUERY_DEV_LIM()
1138 dev_lim->max_desc_sz = size; in mthca_QUERY_DEV_LIM()
1141 dev_lim->max_qp_per_mcg = 1 << field; in mthca_QUERY_DEV_LIM()
1143 dev_lim->reserved_mgms = field & 0xf; in mthca_QUERY_DEV_LIM()
1145 dev_lim->max_mcgs = 1 << field; in mthca_QUERY_DEV_LIM()
1147 dev_lim->reserved_pds = field >> 4; in mthca_QUERY_DEV_LIM()
1149 dev_lim->max_pds = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1151 dev_lim->reserved_rdds = field >> 4; in mthca_QUERY_DEV_LIM()
1153 dev_lim->max_rdds = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1156 dev_lim->eec_entry_sz = size; in mthca_QUERY_DEV_LIM()
1158 dev_lim->qpc_entry_sz = size; in mthca_QUERY_DEV_LIM()
1160 dev_lim->eeec_entry_sz = size; in mthca_QUERY_DEV_LIM()
1162 dev_lim->eqpc_entry_sz = size; in mthca_QUERY_DEV_LIM()
1164 dev_lim->eqc_entry_sz = size; in mthca_QUERY_DEV_LIM()
1166 dev_lim->cqc_entry_sz = size; in mthca_QUERY_DEV_LIM()
1168 dev_lim->srq_entry_sz = size; in mthca_QUERY_DEV_LIM()
1170 dev_lim->uar_scratch_entry_sz = size; in mthca_QUERY_DEV_LIM()
1174 dev_lim->max_srq_sz = 1 << field; in mthca_QUERY_DEV_LIM()
1176 dev_lim->max_qp_sz = 1 << field; in mthca_QUERY_DEV_LIM()
1178 dev_lim->hca.arbel.resize_srq = field & 1; in mthca_QUERY_DEV_LIM()
1180 dev_lim->max_sg = min_t(int, field, dev_lim->max_sg); in mthca_QUERY_DEV_LIM()
1182 dev_lim->max_desc_sz = min_t(int, size, dev_lim->max_desc_sz); in mthca_QUERY_DEV_LIM()
1184 dev_lim->mpt_entry_sz = size; in mthca_QUERY_DEV_LIM()
1186 dev_lim->hca.arbel.max_pbl_sz = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1187 MTHCA_GET(dev_lim->hca.arbel.bmme_flags, outbox, in mthca_QUERY_DEV_LIM()
1189 MTHCA_GET(dev_lim->hca.arbel.reserved_lkey, outbox, in mthca_QUERY_DEV_LIM()
1192 dev_lim->hca.arbel.lam_required = field & 1; in mthca_QUERY_DEV_LIM()
1193 MTHCA_GET(dev_lim->hca.arbel.max_icm_sz, outbox, in mthca_QUERY_DEV_LIM()
1196 if (dev_lim->hca.arbel.bmme_flags & 1) in mthca_QUERY_DEV_LIM()
1199 dev_lim->hca.arbel.bmme_flags, in mthca_QUERY_DEV_LIM()
1200 dev_lim->hca.arbel.max_pbl_sz, in mthca_QUERY_DEV_LIM()
1201 dev_lim->hca.arbel.reserved_lkey); in mthca_QUERY_DEV_LIM()
1206 (unsigned long long) dev_lim->hca.arbel.max_icm_sz >> 20); in mthca_QUERY_DEV_LIM()
1209 dev_lim->max_srq_sz = (1 << field) - 1; in mthca_QUERY_DEV_LIM()
1211 dev_lim->max_qp_sz = (1 << field) - 1; in mthca_QUERY_DEV_LIM()
1213 dev_lim->hca.tavor.max_avs = 1 << (field & 0x3f); in mthca_QUERY_DEV_LIM()
1214 dev_lim->mpt_entry_sz = MTHCA_MPT_ENTRY_SIZE; in mthca_QUERY_DEV_LIM()
1218 dev_lim->max_qps, dev_lim->reserved_qps, dev_lim->qpc_entry_sz); in mthca_QUERY_DEV_LIM()
1220 dev_lim->max_srqs, dev_lim->reserved_srqs, dev_lim->srq_entry_sz); in mthca_QUERY_DEV_LIM()
1222 dev_lim->max_cqs, dev_lim->reserved_cqs, dev_lim->cqc_entry_sz); in mthca_QUERY_DEV_LIM()
1224 dev_lim->max_eqs, dev_lim->reserved_eqs, dev_lim->eqc_entry_sz); in mthca_QUERY_DEV_LIM()
1226 dev_lim->reserved_mrws, dev_lim->reserved_mtts); in mthca_QUERY_DEV_LIM()
1228 dev_lim->max_pds, dev_lim->reserved_pds, dev_lim->reserved_uars); in mthca_QUERY_DEV_LIM()
1230 dev_lim->max_pds, dev_lim->reserved_mgms); in mthca_QUERY_DEV_LIM()
1232 dev_lim->max_cq_sz, dev_lim->max_qp_sz, dev_lim->max_srq_sz); in mthca_QUERY_DEV_LIM()
1234 mthca_dbg(dev, "Flags: %08x\n", dev_lim->flags); in mthca_QUERY_DEV_LIM()
1260 * swaps each 4-byte word before passing it back to in get_board_id()
1286 outbox = mailbox->buf; in mthca_QUERY_ADAPTER()
1288 err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_ADAPTER, in mthca_QUERY_ADAPTER()
1295 MTHCA_GET(adapter->vendor_id, outbox, in mthca_QUERY_ADAPTER()
1297 MTHCA_GET(adapter->device_id, outbox, in mthca_QUERY_ADAPTER()
1299 MTHCA_GET(adapter->revision_id, outbox, in mthca_QUERY_ADAPTER()
1302 MTHCA_GET(adapter->inta_pin, outbox, QUERY_ADAPTER_INTA_PIN_OFFSET); in mthca_QUERY_ADAPTER()
1305 adapter->board_id); in mthca_QUERY_ADAPTER()
1360 inbox = mailbox->buf; in mthca_INIT_HCA()
1364 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) in mthca_INIT_HCA()
1378 if (dev->device_cap_flags & IB_DEVICE_UD_IP_CSUM) in mthca_INIT_HCA()
1385 MTHCA_PUT(inbox, param->qpc_base, INIT_HCA_QPC_BASE_OFFSET); in mthca_INIT_HCA()
1386 MTHCA_PUT(inbox, param->log_num_qps, INIT_HCA_LOG_QP_OFFSET); in mthca_INIT_HCA()
1387 MTHCA_PUT(inbox, param->eec_base, INIT_HCA_EEC_BASE_OFFSET); in mthca_INIT_HCA()
1388 MTHCA_PUT(inbox, param->log_num_eecs, INIT_HCA_LOG_EEC_OFFSET); in mthca_INIT_HCA()
1389 MTHCA_PUT(inbox, param->srqc_base, INIT_HCA_SRQC_BASE_OFFSET); in mthca_INIT_HCA()
1390 MTHCA_PUT(inbox, param->log_num_srqs, INIT_HCA_LOG_SRQ_OFFSET); in mthca_INIT_HCA()
1391 MTHCA_PUT(inbox, param->cqc_base, INIT_HCA_CQC_BASE_OFFSET); in mthca_INIT_HCA()
1392 MTHCA_PUT(inbox, param->log_num_cqs, INIT_HCA_LOG_CQ_OFFSET); in mthca_INIT_HCA()
1393 MTHCA_PUT(inbox, param->eqpc_base, INIT_HCA_EQPC_BASE_OFFSET); in mthca_INIT_HCA()
1394 MTHCA_PUT(inbox, param->eeec_base, INIT_HCA_EEEC_BASE_OFFSET); in mthca_INIT_HCA()
1395 MTHCA_PUT(inbox, param->eqc_base, INIT_HCA_EQC_BASE_OFFSET); in mthca_INIT_HCA()
1396 MTHCA_PUT(inbox, param->log_num_eqs, INIT_HCA_LOG_EQ_OFFSET); in mthca_INIT_HCA()
1397 MTHCA_PUT(inbox, param->rdb_base, INIT_HCA_RDB_BASE_OFFSET); in mthca_INIT_HCA()
1403 MTHCA_PUT(inbox, param->mc_base, INIT_HCA_MC_BASE_OFFSET); in mthca_INIT_HCA()
1404 MTHCA_PUT(inbox, param->log_mc_entry_sz, INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET); in mthca_INIT_HCA()
1405 MTHCA_PUT(inbox, param->mc_hash_sz, INIT_HCA_MC_HASH_SZ_OFFSET); in mthca_INIT_HCA()
1406 MTHCA_PUT(inbox, param->log_mc_table_sz, INIT_HCA_LOG_MC_TABLE_SZ_OFFSET); in mthca_INIT_HCA()
1410 MTHCA_PUT(inbox, param->mpt_base, INIT_HCA_MPT_BASE_OFFSET); in mthca_INIT_HCA()
1412 MTHCA_PUT(inbox, param->mtt_seg_sz, INIT_HCA_MTT_SEG_SZ_OFFSET); in mthca_INIT_HCA()
1413 MTHCA_PUT(inbox, param->log_mpt_sz, INIT_HCA_LOG_MPT_SZ_OFFSET); in mthca_INIT_HCA()
1414 MTHCA_PUT(inbox, param->mtt_base, INIT_HCA_MTT_BASE_OFFSET); in mthca_INIT_HCA()
1418 u8 uar_page_sz = PAGE_SHIFT - 12; in mthca_INIT_HCA()
1422 MTHCA_PUT(inbox, param->uar_scratch_base, INIT_HCA_UAR_SCATCH_BASE_OFFSET); in mthca_INIT_HCA()
1425 MTHCA_PUT(inbox, param->log_uarc_sz, INIT_HCA_UARC_SZ_OFFSET); in mthca_INIT_HCA()
1426 MTHCA_PUT(inbox, param->log_uar_sz, INIT_HCA_LOG_UAR_SZ_OFFSET); in mthca_INIT_HCA()
1427 MTHCA_PUT(inbox, param->uarc_base, INIT_HCA_UAR_CTX_BASE_OFFSET); in mthca_INIT_HCA()
1430 err = mthca_cmd(dev, mailbox->dma, 0, 0, in mthca_INIT_HCA()
1463 inbox = mailbox->buf; in mthca_INIT_IB()
1468 flags |= param->set_guid0 ? INIT_IB_FLAG_G0 : 0; in mthca_INIT_IB()
1469 flags |= param->set_node_guid ? INIT_IB_FLAG_NG : 0; in mthca_INIT_IB()
1470 flags |= param->set_si_guid ? INIT_IB_FLAG_SIG : 0; in mthca_INIT_IB()
1471 flags |= param->vl_cap << INIT_IB_VL_SHIFT; in mthca_INIT_IB()
1472 flags |= param->port_width << INIT_IB_PORT_WIDTH_SHIFT; in mthca_INIT_IB()
1473 flags |= param->mtu_cap << INIT_IB_MTU_SHIFT; in mthca_INIT_IB()
1476 MTHCA_PUT(inbox, param->gid_cap, INIT_IB_MAX_GID_OFFSET); in mthca_INIT_IB()
1477 MTHCA_PUT(inbox, param->pkey_cap, INIT_IB_MAX_PKEY_OFFSET); in mthca_INIT_IB()
1478 MTHCA_PUT(inbox, param->guid0, INIT_IB_GUID0_OFFSET); in mthca_INIT_IB()
1479 MTHCA_PUT(inbox, param->node_guid, INIT_IB_NODE_GUID_OFFSET); in mthca_INIT_IB()
1480 MTHCA_PUT(inbox, param->si_guid, INIT_IB_SI_GUID_OFFSET); in mthca_INIT_IB()
1482 err = mthca_cmd(dev, mailbox->dma, port, 0, CMD_INIT_IB, in mthca_INIT_IB()
1517 inbox = mailbox->buf; in mthca_SET_IB()
1521 flags |= param->set_si_guid ? SET_IB_FLAG_SIG : 0; in mthca_SET_IB()
1522 flags |= param->reset_qkey_viol ? SET_IB_FLAG_RQK : 0; in mthca_SET_IB()
1525 MTHCA_PUT(inbox, param->cap_mask, SET_IB_CAP_MASK_OFFSET); in mthca_SET_IB()
1526 MTHCA_PUT(inbox, param->si_guid, SET_IB_SI_GUID_OFFSET); in mthca_SET_IB()
1528 err = mthca_cmd(dev, mailbox->dma, port, 0, CMD_SET_IB, in mthca_SET_IB()
1549 inbox = mailbox->buf; in mthca_MAP_ICM_page()
1554 err = mthca_cmd(dev, mailbox->dma, 1, 0, CMD_MAP_ICM, in mthca_MAP_ICM_page()
1577 return mthca_map_cmd(dev, CMD_MAP_ICM_AUX, icm, -1); in mthca_MAP_ICM_AUX()
1599 (PAGE_SHIFT - MTHCA_ICM_PAGE_SHIFT); in mthca_SET_ICM_SIZE()
1608 return mthca_cmd(dev, mailbox->dma, mpt_index, 0, CMD_SW2HW_MPT, in mthca_SW2HW_MPT()
1615 return mthca_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, in mthca_HW2SW_MPT()
1623 return mthca_cmd(dev, mailbox->dma, num_mtt, 0, CMD_WRITE_MTT, in mthca_WRITE_MTT()
1645 return mthca_cmd(dev, mailbox->dma, eq_num, 0, CMD_SW2HW_EQ, in mthca_SW2HW_EQ()
1652 return mthca_cmd_box(dev, 0, mailbox->dma, eq_num, 0, in mthca_HW2SW_EQ()
1660 return mthca_cmd(dev, mailbox->dma, cq_num, 0, CMD_SW2HW_CQ, in mthca_SW2HW_CQ()
1667 return mthca_cmd_box(dev, 0, mailbox->dma, cq_num, 0, in mthca_HW2SW_CQ()
1685 inbox = mailbox->buf; in mthca_RESIZE_CQ()
1689 * Leave start address fields zeroed out -- mthca assumes that in mthca_RESIZE_CQ()
1695 err = mthca_cmd(dev, mailbox->dma, cq_num, 1, CMD_RESIZE_CQ, in mthca_RESIZE_CQ()
1705 return mthca_cmd(dev, mailbox->dma, srq_num, 0, CMD_SW2HW_SRQ, in mthca_SW2HW_SRQ()
1712 return mthca_cmd_box(dev, 0, mailbox->dma, srq_num, 0, in mthca_HW2SW_SRQ()
1720 return mthca_cmd_box(dev, 0, mailbox->dma, num, 0, in mthca_QUERY_SRQ()
1779 op_mod = 3; /* don't write outbox, any->reset */ in mthca_MODIFY_QP()
1786 op_mod = 2; /* write outbox, any->reset */ in mthca_MODIFY_QP()
1791 err = mthca_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, in mthca_MODIFY_QP()
1798 printk(" %08x\n", be32_to_cpup(mailbox->buf)); in mthca_MODIFY_QP()
1803 be32_to_cpu(((__be32 *) mailbox->buf)[i + 2])); in mthca_MODIFY_QP()
1815 printk(" opt param mask: %08x\n", be32_to_cpup(mailbox->buf)); in mthca_MODIFY_QP()
1820 be32_to_cpu(((__be32 *) mailbox->buf)[i + 2])); in mthca_MODIFY_QP()
1826 err = mthca_cmd(dev, mailbox->dma, optmask | (!!is_ee << 24) | num, in mthca_MODIFY_QP()
1836 return mthca_cmd_box(dev, 0, mailbox->dma, (!!is_ee << 24) | num, 0, in mthca_QUERY_QP()
1858 return -EINVAL; in mthca_CONF_SPECIAL_QP()
1887 inbox = inmailbox->buf; in mthca_MAD_IFC()
1911 MTHCA_PUT(inbox, in_wc->qp->qp_num, MAD_IFC_MY_QPN_OFFSET); in mthca_MAD_IFC()
1912 MTHCA_PUT(inbox, in_wc->src_qp, MAD_IFC_RQPN_OFFSET); in mthca_MAD_IFC()
1914 val = in_wc->sl << 4; in mthca_MAD_IFC()
1917 val = in_wc->dlid_path_bits | in mthca_MAD_IFC()
1918 (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0); in mthca_MAD_IFC()
1921 MTHCA_PUT(inbox, in_wc->slid, MAD_IFC_RLID_OFFSET); in mthca_MAD_IFC()
1922 MTHCA_PUT(inbox, in_wc->pkey_index, MAD_IFC_PKEY_OFFSET); in mthca_MAD_IFC()
1929 in_modifier |= in_wc->slid << 16; in mthca_MAD_IFC()
1932 err = mthca_cmd_box(dev, inmailbox->dma, outmailbox->dma, in mthca_MAD_IFC()
1937 memcpy(response_mad, outmailbox->buf, 256); in mthca_MAD_IFC()
1947 return mthca_cmd_box(dev, 0, mailbox->dma, index, 0, in mthca_READ_MGM()
1954 return mthca_cmd(dev, mailbox->dma, index, 0, CMD_WRITE_MGM, in mthca_WRITE_MGM()
1964 err = mthca_cmd_imm(dev, mailbox->dma, &imm, 0, 0, CMD_MGID_HASH, in mthca_MGID_HASH()