Lines Matching +full:host +full:- +full:id
1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 1999-2015, Broadcom Corporation
9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's
30 * JEDEC JEP-106 Core Vendor IDs
32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's
33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell
38 * will need to convert bus-specific vendor IDs to their BHND_MFGID
39 * JEP-106 equivalents.
41 * @par ARM 4-bit Continuation Code
43 * BHND MFGIDs are encoded using ARM's non-standard 4-bit continuation code
48 * [cont code][mfg id]
51 * The 4-bit continuation code field specifies the number of JEP-106
52 * continuation codes that prefix the manufacturer's ID code. In the case of
53 * ARM's JEP-106 ID of `0x7F 0x7F 0x7F 0x7F 0x3B`, the four 0x7F continuations
54 * are encoded as '4' in the 4-bit continuation code field (i.e. 0x43B).
56 #define BHND_MFGID_ARM 0x043b /**< arm JEP-106 vendor id */
57 #define BHND_MFGID_BCM 0x04bf /**< broadcom JEP-106 vendor id */
58 #define BHND_MFGID_MIPS 0x04a7 /**< mips JEP-106 vendor id */
59 #define BHND_MFGID_INVALID 0x0000 /**< invalid JEP-106 vendor id */
64 * OCP-IP assigned vendor codes are used by siba(4)
66 #define OCP_VENDOR_BCM 0x4243 /**< Broadcom OCP vendor id */
82 #define PCI_VENDOR_SI_IMAGE 0x1095 /* Silicon Image, used by Arasan SDIO Host */
83 #define PCI_VENDOR_BUFFALO 0x1154 /* Buffalo vendor id */
123 #define PCI_DEVID_BCM3352 0x3352 /* bcm3352 device id */
124 #define PCI_DEVID_BCM3360 0x3360 /* bcm3360 device id */
131 #define PCI_DEVID_BCM4311_D11G 0x4311 /* 4311 802.11b/g id */
132 #define PCI_DEVID_BCM4311_D11DUAL 0x4312 /* 4311 802.11a/b/g id */
133 #define PCI_DEVID_BCM4311_D11A 0x4313 /* 4311 802.11a id */
134 #define PCI_DEVID_BCM4328_D11DUAL 0x4314 /* 4328/4312 802.11a/g id */
135 #define PCI_DEVID_BCM4328_D11G 0x4315 /* 4328/4312 802.11g id */
136 #define PCI_DEVID_BCM4328_D11A 0x4316 /* 4328/4312 802.11a id */
137 #define PCI_DEVID_BCM4318_D11G 0x4318 /* 4318 802.11b/g id */
138 #define PCI_DEVID_BCM4318_D11DUAL 0x4319 /* 4318 802.11a/b/g id */
139 #define PCI_DEVID_BCM4318_D11A 0x431a /* 4318 802.11a id */
140 #define PCI_DEVID_BCM4325_D11DUAL 0x431b /* 4325 802.11a/g id */
141 #define PCI_DEVID_BCM4325_D11G 0x431c /* 4325 802.11g id */
142 #define PCI_DEVID_BCM4325_D11A 0x431d /* 4325 802.11a id */
149 #define PCI_DEVID_BCM4321_D11N 0x4328 /* 4321 802.11n dualband id */
150 #define PCI_DEVID_BCM4321_D11N2G 0x4329 /* 4321 802.11n 2.4Ghz band id */
151 #define PCI_DEVID_BCM4321_D11N5G 0x432a /* 4321 802.11n 5Ghz band id */
158 #define PCI_DEVID_BCM4315_D11DUAL 0x4334 /* 4315 802.11a/g id */
159 #define PCI_DEVID_BCM4315_D11G 0x4335 /* 4315 802.11g id */
160 #define PCI_DEVID_BCM4315_D11A 0x4336 /* 4315 802.11a id */
183 #define PCI_DEVID_BCM6362_D11N2G 0x433f /* 6362 802.11n 2.4Ghz band id */
184 #define PCI_DEVID_BCM6362_D11N5G 0x434f /* 6362 802.11n 5Ghz band id */
185 #define PCI_DEVID_BCM4331_D11N 0x4331 /* 4331 802.11n dualband id */
186 #define PCI_DEVID_BCM4331_D11N2G 0x4332 /* 4331 802.11n 2.4Ghz band id */
187 #define PCI_DEVID_BCM4331_D11N5G 0x4333 /* 4331 802.11n 5Ghz band id */
220 #define PCI_DEVID_PCIXX21_FLASHMEDIA0 0x8033 /* TI PCI xx21 Standard Host Controller */
221 #define PCI_DEVID_PCIXX21_SDIOH0 0x8034 /* TI PCI xx21 Standard Host Controller */
240 #define PCI_SUBDEVID_BCMGPRS_UART 0x4333 /* Uart id used by 4306/gprs card */
241 #define PCI_SUBDEVID_BCMGPRS2_UART 0x4344 /* Uart id used by 4306/gprs card */
242 #define PCI_SUBDEVID_BCM_FPGA_JTAGM 0x43f0 /* FPGA jtagm device id */
243 #define PCI_SUBDEVID_BCM_JTAGM 0x43f1 /* BCM jtagm device id */
244 #define PCI_SUBDEVID_BCM_SDIOH_FPGA 0x43f2 /* sdio host fpga */
245 #define PCI_SUBDEVID_BCM_SDIOH 0x43f3 /* BCM sdio host id */
247 #define PCI_SUBDEVID_BCM_SPIH_FPGA 0x43f5 /* PCI SPI Host Controller FPGA */
248 #define PCI_SUBDEVID_BCM_SPIH 0x43f6 /* Synopsis SPI Host Controller */
249 #define PCI_SUBDEVID_BCM_MIMO_FPGA 0x43f8 /* FPGA mimo minimacphy device id */
250 #define PCI_SUBDEVID_BCM_JTAGM2 0x43f9 /* PCI_SUBDEVID_BCM alternate jtagm device id */
251 #define PCI_SUBDEVID_BCM_SDHCI_FPGA 0x43fa /* Standard SDIO Host Controller FPGA */
265 #define PCI_SUBDEVID_BCM47XX_USBH 0x4716 /* 47xx usb host */
269 #define PCI_SUBDEVID_BCM47XX_USB20H 0x471a /* 47xx usb 2.0 host */
276 #define PCI_SUBDEVID_BCM47XX_USB30H 0x472a /* 47xx usb 3.0 host */
282 #define PCI_SUBDEVID_BCM_JINVANI_SDIOH 0x4743 /* Jinvani SDIO Gold Host */
283 #define PCI_SUBDEVID_BCM27XX_SDIOH 0x2702 /* PCI_SUBDEVID_BCM27xx Standard SDIO Host */
284 #define PCI_SUBDEVID_BCM_PCIXX21_FLASHMEDIA 0x803b /* TI PCI xx21 Standard Host Controller */
285 #define PCI_SUBDEVID_BCM_PCIXX21_SDIOH 0x803c /* TI PCI xx21 Standard Host Controller */
286 #define PCI_SUBDEVID_BCM_R5C822_SDIOH 0x0822 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host */
287 #define PCI_SUBDEVID_BCM_JMICRON_SDIOH 0x2381 /* JMicron Standard SDIO Host Controller */
295 #define BHND_CHIPID_BCM4313 0x4313 /* 4313 chip id */
296 #define BHND_CHIPID_BCM43131 43131 /* 43131 chip id (OTP chipid) */
297 #define BHND_CHIPID_BCM4315 0x4315 /* 4315 chip id */
299 #define BHND_CHIPID_BCM4319 0x4319 /* 4319 chip id */
302 #define BHND_CHIPID_BCM43217 43217 /* 43217 chip id (OTP chipid) */
324 #define BHND_CHIPID_BCM4325 0x4325 /* 4325 chip id */
325 #define BHND_CHIPID_BCM4328 0x4328 /* 4328 chip id */
374 #define BHND_PKGID_BCM4303 2 /* 4303 package id */
375 #define BHND_PKGID_BCM4309 1 /* 4309 package id */
376 #define BHND_PKGID_BCM4712LARGE 0 /* 340pin 4712 package id */
377 #define BHND_PKGID_BCM4712SMALL 1 /* 200pin 4712 package id */
378 #define BHND_PKGID_BCM4712MID 2 /* 225pin 4712 package id */
379 #define BHND_PKGID_BCM4328USBD11G 2 /* 4328 802.11g USB package id */
380 #define BHND_PKGID_BCM4328USBDUAL 3 /* 4328 802.11a/g USB package id */
381 #define BHND_PKGID_BCM4328SDIOD11G 4 /* 4328 802.11g SDIO package id */
382 #define BHND_PKGID_BCM4328SDIODUAL 5 /* 4328 802.11a/g SDIO package id */
383 #define BHND_PKGID_BCM4329_289PIN 0 /* 4329 289-pin package id */
384 #define BHND_PKGID_BCM4329_182PIN 1 /* 4329N 182-pin package id */
385 #define BHND_PKGID_BCM5354E 1 /* 5354E package id */
386 #define BHND_PKGID_BCM4716 8 /* 4716 package id */
387 #define BHND_PKGID_BCM4717 9 /* 4717 package id */
388 #define BHND_PKGID_BCM4718 10 /* 4718 package id */
390 #define BHND_PKGID_BCM5358U 8 /* 5358U package id */
391 #define BHND_PKGID_BCM5358 9 /* 5358 package id */
392 #define BHND_PKGID_BCM47186 10 /* 47186 package id */
393 #define BHND_PKGID_BCM5357 11 /* 5357 package id */
394 #define BHND_PKGID_BCM5356U 12 /* 5356U package id */
395 #define BHND_PKGID_BCM53572 8 /* 53572 package id */
396 #define BHND_PKGID_BCM5357C0 8 /* 5357c0 package id (the same as 53572) */
397 #define BHND_PKGID_BCM47188 9 /* 47188 package id */
398 #define BHND_PKGID_BCM5358C0 0xa /* 5358c0 package id */
399 #define BHND_PKGID_BCM5356C0 0xb /* 5356c0 package id */
400 #define BHND_PKGID_BCM4331TT 8 /* 4331 12x12 package id */
401 #define BHND_PKGID_BCM4331TN 9 /* 4331 12x9 package id */
402 #define BHND_PKGID_BCM4331TNA0 0xb /* 4331 12x9 package id */
403 #define BHND_PKGID_BCM4706L 1 /* 4706L package id */
405 #define BHND_PKGID_HDLSIM5350 1 /* HDL simulator package id for a 5350 */
406 #define BHND_PKGID_HDLSIM 14 /* HDL simulator package id */
407 #define BHND_PKGID_HWSIM 15 /* Hardware simulator package id */
412 #define BHND_PKGID_BCM4314PCIE_ARM (8 | 0) /* 4314 QFN PCI package id, bit 3 tie high */
413 #define BHND_PKGID_BCM4314SDIO (8 | 1) /* 4314 QFN SDIO package id */
414 #define BHND_PKGID_BCM4314PCIE (8 | 2) /* 4314 QFN PCI (ARM-less) package id */
415 #define BHND_PKGID_BCM4314SDIO_ARM (8 | 3) /* 4314 QFN SDIO (ARM-less) package id */
416 #define BHND_PKGID_BCM4314SDIO_FPBGA (8 | 4) /* 4314 FpBGA SDIO package id */
417 #define BHND_PKGID_BCM4314DEV (8 | 6) /* 4314 Development package id */
419 #define BHND_PKGID_BCM4707 1 /* 4707 package id */
420 #define BHND_PKGID_BCM4708 2 /* 4708 package id */
421 #define BHND_PKGID_BCM4709 0 /* 4709 package id */
439 #define BHND_COREID_USB 0x808 /* usb 1.1 host/device core */
454 #define BHND_COREID_USB11H 0x817 /* usb 1.1 host core */
456 #define BHND_COREID_USB20H 0x819 /* usb 2.0 host core */
458 #define BHND_COREID_SDIOH 0x81b /* sdio host core */
468 #define BHND_COREID_ARM7S 0x825 /* ARM7tdmi-s core */
471 #define BHND_COREID_SSNPHY 0x828 /* 802.11n single-stream phy core */
482 #define BHND_COREID_SPIH 0x833 /* SPI host core */
488 #define BHND_COREID_APB_BRIDGE 0x135 /* BP135 AMBA AXI-APB bridge */
491 #define BHND_COREID_OOB_ROUTER 0x367 /* OOB router core ID */
498 #define BHND_COREID_NS_SDIO 0x503 /* sdio host core */
499 #define BHND_COREID_NS_USB20H 0x504 /* usb 2.0 host core */
500 #define BHND_COREID_NS_USB30H 0x505 /* usb 3.0 host core */
514 * PrimeCell-compatible BCM4331 cores, but due to lack of documentation, the
516 #define BHND_PRIMEID_EROM 0x364 /* Enumeration ROM's primecell ID */
521 #define BHND_HWREV_INVALID 0xFF /* Invalid hardware revision ID */
529 /** Evaluates to true if @p _type is a BCMA or BCMA-compatible interconenct */
548 #define BHND_BFL_CCKHIPWR 0x00000040 /* Can do high-power CCK transmission */
584 #define BHND_BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
595 #define BHND_BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */
596 #define BHND_BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */
597 #define BHND_BFL2_TRISTATE_LED 0x00000800 /* Tri-state the LED */
599 #define BHND_BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */
602 #define BHND_BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */
630 /* SROM 11 - 11ac boardflag definitions */
636 #define BHND_BFL2_SROM11_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
637 #define BHND_BFL2_SROM11_ANAPACTRL_2G 0x00100000 /* 2G ext PAs are ctrl-ed by analog PA ctrl lines …
638 #define BHND_BFL2_SROM11_ANAPACTRL_5G 0x00200000 /* 5G ext PAs are ctrl-ed by analog PA ctrl lines …
643 #define BHND_BFL3_TXGAINTBLID 0x00000070 /* acphy, txgain table id */
644 #define BHND_BFL3_TXGAINTBLID_SHIFT 0x4 /* acphy, txgain table id shift bit */
663 #define BHND_BFL3_EN_NONBRCM_TXBF 0x10000000 /* acphy, enable non-brcm TXBF */
666 /* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
742 /* 11a-only minipci */
1071 /* These values are used by dhd USB host driver. */