120 #define XGBE_PHY_PORT_SPEED_100		BIT(0)
125 #define XGBE_MUTEX_RELEASE		0x80000000
131 #define XGBE_SFP_SERIAL_ID_ADDRESS	0x50
132 #define XGBE_SFP_DIAG_INFO_ADDRESS	0x51
133 #define XGBE_SFP_PHY_ADDRESS		0x56
134 #define XGBE_GPIO_ADDRESS_PCA9555	0x20
137 #define XGBE_GPIO_NO_TX_FAULT		BIT(0)
157 	XGBE_PORT_MODE_RSVD = 0,
170 	XGBE_CONN_TYPE_NONE = 0,
180 	XGBE_SFP_COMM_DIRECT = 0,
185 	XGBE_SFP_CABLE_UNKNOWN = 0,
191 	XGBE_SFP_BASE_UNKNOWN = 0,
210 	XGBE_SFP_SPEED_UNKNOWN = 0,
218 /* SFP Serial ID Base ID values relative to an offset of 0 */
219 #define XGBE_SFP_BASE_ID			0
220 #define XGBE_SFP_ID_SFP				0x03
223 #define XGBE_SFP_EXT_ID_SFP			0x04
226 #define XGBE_SFP_BASE_CV_CP			0x21
235 #define XGBE_SFP_BASE_1GBE_CC_SX		BIT(0)
249 #define XGBE_SFP_BASE_BR_100M_MIN		0x1
250 #define XGBE_SFP_BASE_BR_100M_MAX		0x2
251 #define XGBE_SFP_BASE_BR_1GBE_MIN		0x0a
252 #define XGBE_SFP_BASE_BR_1GBE_MAX		0x0d
253 #define XGBE_SFP_BASE_BR_10GBE_MIN		0x64
254 #define XGBE_SFP_BASE_BR_10GBE_MAX		0x68
255 #define XGBE_SFP_BASE_BR_25GBE			0xFF
259 #define XGBE_SFP_BASE_SM_LEN_KM_MIN		0x0A
263 #define XGBE_SFP_BASE_SM_LEN_100M_MIN		0x64
280 #define XGBE_SFP_BASE_OSC_1310			0x051E
328 	XGBE_MDIO_RESET_NONE = 0,
336 	XGBE_PHY_REDRV_IF_MDIO = 0,
342 	XGBE_PHY_REDRV_MODEL_4223 = 0,
352 #define XGBE_PHY_REDRV_MODE_REG	0x12b0
444 	redrv_data[0] = ((reg >> 8) & 0xff) << 1;  in xgbe_phy_redrv_write()
445 	redrv_data[1] = reg & 0xff;  in xgbe_phy_redrv_write()
450 	csum = 0;  in xgbe_phy_redrv_write()
451 	for (i = 0; i < 4; i++) {  in xgbe_phy_redrv_write()
486 	if (redrv_data[0] != 0xff) {  in xgbe_phy_redrv_write()
522 	axgbe_printf(3, "%s: target 0x%x reg_len %d val_len %d\n", __func__,  in xgbe_phy_i2c_read()
563 		return (0);  in xgbe_phy_sfp_put_mux()
566 	mux_channel = 0;  in xgbe_phy_sfp_put_mux()
583 		return (0);  in xgbe_phy_sfp_get_mux()
619 	mutex_id = 0;  in xgbe_phy_get_comm_ownership()
636 		return (0);  in xgbe_phy_get_comm_ownership()
674 	mii_data[0] = reg & 0xff;  in xgbe_phy_i2c_mii_write()
887 	axgbe_printf(1, "%s: link speed %d spf_base 0x%x pause_autoneg %d "  in xgbe_phy_sfp_phy_settings()
888 	    "advert 0x%x support 0x%x\n", __func__, pdata->phy.speed,  in xgbe_phy_sfp_phy_settings()
932 		phy_data->phydev = 0;  in xgbe_phy_free_phy_device()
949 	if ((phy_id & 0xfffffff0) != 0x01ff0cc0)  in xgbe_phy_finisar_phy_quirks()
953 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x16, 0x0001);  in xgbe_phy_finisar_phy_quirks()
954 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, 0x9140);  in xgbe_phy_finisar_phy_quirks()
955 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x16, 0x0000);  in xgbe_phy_finisar_phy_quirks()
958 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1b, 0x9084);  in xgbe_phy_finisar_phy_quirks()
959 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x09, 0x0e00);  in xgbe_phy_finisar_phy_quirks()
960 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, 0x8140);  in xgbe_phy_finisar_phy_quirks()
961 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x04, 0x0d01);  in xgbe_phy_finisar_phy_quirks()
962 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, 0x9140);  in xgbe_phy_finisar_phy_quirks()
991 	if ((phy_id & 0xfffffff0) != 0x03625d10)  in xgbe_phy_belfuse_phy_quirks()
995 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x18, 0x7007);  in xgbe_phy_belfuse_phy_quirks()
996 	reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x18);  in xgbe_phy_belfuse_phy_quirks()
997 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x18, reg & ~0x0080);  in xgbe_phy_belfuse_phy_quirks()
1000 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x7c00);  in xgbe_phy_belfuse_phy_quirks()
1001 	reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x1c);  in xgbe_phy_belfuse_phy_quirks()
1002 	reg &= 0x03ff;  in xgbe_phy_belfuse_phy_quirks()
1003 	reg &= ~0x0001;  in xgbe_phy_belfuse_phy_quirks()
1004 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x8000 | 0x7c00 |  in xgbe_phy_belfuse_phy_quirks()
1005 	    reg | 0x0001);  in xgbe_phy_belfuse_phy_quirks()
1008 	reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x00);  in xgbe_phy_belfuse_phy_quirks()
1009 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, reg | 0x00800);  in xgbe_phy_belfuse_phy_quirks()
1012 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x7c00);  in xgbe_phy_belfuse_phy_quirks()
1013 	reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x1c);  in xgbe_phy_belfuse_phy_quirks()
1014 	reg &= 0x03ff;  in xgbe_phy_belfuse_phy_quirks()
1015 	reg &= ~0x0006;  in xgbe_phy_belfuse_phy_quirks()
1016 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x8000 | 0x7c00 |  in xgbe_phy_belfuse_phy_quirks()
1017 	    reg | 0x0004);  in xgbe_phy_belfuse_phy_quirks()
1020 	reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x00);  in xgbe_phy_belfuse_phy_quirks()
1021 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, reg & ~0x00800);  in xgbe_phy_belfuse_phy_quirks()
1024 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x7c00);  in xgbe_phy_belfuse_phy_quirks()
1025 	reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x1c);  in xgbe_phy_belfuse_phy_quirks()
1026 	reg &= 0x03ff;  in xgbe_phy_belfuse_phy_quirks()
1027 	reg &= ~0x0001;  in xgbe_phy_belfuse_phy_quirks()
1028 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x1c, 0x8000 | 0x7c00 |  in xgbe_phy_belfuse_phy_quirks()
1032 	reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x00);  in xgbe_phy_belfuse_phy_quirks()
1033 	xgbe_phy_mii_write(pdata, phy_data->mdio_addr, 0x00, reg & ~0x00800);  in xgbe_phy_belfuse_phy_quirks()
1057 	phy_reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x02);  in xgbe_get_phy_id()
1058 	if (phy_reg < 0)  in xgbe_get_phy_id()
1061 	phy_id1 = (phy_reg & 0xffff);  in xgbe_get_phy_id()
1062 	phy_data->phy_id = (phy_reg & 0xffff) << 16;  in xgbe_get_phy_id()
1064 	phy_reg = xgbe_phy_mii_read(pdata, phy_data->mdio_addr, 0x03);  in xgbe_get_phy_id()
1065 	if (phy_reg < 0)  in xgbe_get_phy_id()
1068 	phy_id2 = (phy_reg & 0xffff);  in xgbe_get_phy_id()
1069 	phy_data->phy_id |= (phy_reg & 0xffff);  in xgbe_get_phy_id()
1074 	axgbe_printf(2, "%s: phy_id1: 0x%x phy_id2: 0x%x oui: %#x model %#x\n",  in xgbe_get_phy_id()
1077 	return (0);  in xgbe_get_phy_id()
1087 	    "0x%08x\n", __func__, phy_data->phydev, phy_data->phydev_mode,  in xgbe_phy_find_phy_device()
1093 		return (0);  in xgbe_phy_find_phy_device()
1097 	pdata->an_again = 0;  in xgbe_phy_find_phy_device()
1103 		return (0);  in xgbe_phy_find_phy_device()
1111 		return (0);  in xgbe_phy_find_phy_device()
1126 	axgbe_printf(2, "Get phy_id 0x%08x\n", phy_data->phy_id);  in xgbe_phy_find_phy_device()
1131 	return (0);  in xgbe_phy_find_phy_device()
1140 	axgbe_printf(3, "%s: sfp_changed: 0x%x\n", __func__,  in xgbe_phy_sfp_external_phy()
1145 	phy_data->sfp_phy_avail = 0;  in xgbe_phy_sfp_external_phy()
1152 	if (ret < 0) {  in xgbe_phy_sfp_external_phy()
1155 			phy_data->sfp_phy_retries = 0;  in xgbe_phy_sfp_external_phy()
1227 	uint16_t wavelen = 0;  in xgbe_phy_sfp_parse_eeprom()
1332 	axgbe_printf(3, "%s: sfp_base: 0x%x sfp_speed: 0x%x sfp_cable: 0x%x "  in xgbe_phy_sfp_parse_eeprom()
1333 	    "rx_los 0x%x tx_fault 0x%x\n", __func__, phy_data->sfp_base,  in xgbe_phy_sfp_parse_eeprom()
1345 	axgbe_printf(0, "SFP detected:\n");  in xgbe_phy_sfp_eeprom_info()
1348 	sfp_data[XGBE_SFP_BASE_VENDOR_NAME_LEN] = '\0';  in xgbe_phy_sfp_eeprom_info()
1349 	axgbe_printf(0, "  vendor:	 %s\n",  in xgbe_phy_sfp_eeprom_info()
1354 	sfp_data[XGBE_SFP_BASE_VENDOR_PN_LEN] = '\0';  in xgbe_phy_sfp_eeprom_info()
1355 	axgbe_printf(0, "  part number:    %s\n",  in xgbe_phy_sfp_eeprom_info()
1360 	sfp_data[XGBE_SFP_BASE_VENDOR_REV_LEN] = '\0';  in xgbe_phy_sfp_eeprom_info()
1361 	axgbe_printf(0, "  revision level: %s\n",  in xgbe_phy_sfp_eeprom_info()
1366 	sfp_data[XGBE_SFP_BASE_VENDOR_SN_LEN] = '\0';  in xgbe_phy_sfp_eeprom_info()
1367 	axgbe_printf(0, "  serial number:  %s\n",  in xgbe_phy_sfp_eeprom_info()
1376 	for (cc = 0; len; buf++, len--)  in xgbe_phy_sfp_verify_eeprom()
1385 	axgbe_printf(3, "sfp_base[XGBE_SFP_BASE_ID]     : 0x%04x\n",  in dump_sfp_eeprom()
1387 	axgbe_printf(3, "sfp_base[XGBE_SFP_BASE_EXT_ID] : 0x%04x\n",  in dump_sfp_eeprom()
1389 	axgbe_printf(3, "sfp_base[XGBE_SFP_BASE_CABLE]  : 0x%04x\n",  in dump_sfp_eeprom()
1408 	eeprom_addr = 0;  in xgbe_phy_sfp_read_eeprom()
1447 		phy_data->sfp_changed = 0;  in xgbe_phy_sfp_read_eeprom()
1464 	axgbe_printf(3, "%s: befor sfp_mod:%d sfp_gpio_address:0x%x\n",  in xgbe_phy_sfp_signals()
1473 	gpio_reg = 0;  in xgbe_phy_sfp_signals()
1477 		axgbe_error("%s: I2C error reading SFP GPIO addr:0x%x\n",  in xgbe_phy_sfp_signals()
1482 	phy_data->sfp_gpio_inputs = (gpio_ports[1] << 8) | gpio_ports[0];  in xgbe_phy_sfp_signals()
1483 	phy_data->port_sfp_inputs = (phy_data->sfp_gpio_inputs >> shift) & 0x0F;  in xgbe_phy_sfp_signals()
1486 		axgbe_printf(0, "%s: port_sfp_inputs: 0x%0x\n", __func__,  in xgbe_phy_sfp_signals()
1491 	axgbe_printf(3, "%s: after sfp_mod:%d sfp_gpio_inputs:0x%x\n",  in xgbe_phy_sfp_signals()
1503 	int ret = 0;  in xgbe_read_gpio_expander()
1512 	for (int i = 0; i < 3; i++) {  in xgbe_read_gpio_expander()
1523 			phy_data->sfp_gpio_outputs = (gpio_ports[1] << 8) | gpio_ports[0];  in xgbe_read_gpio_expander()
1525 			phy_data->sfp_gpio_polarity = (gpio_ports[1] << 8) | gpio_ports[0];  in xgbe_read_gpio_expander()
1527 			phy_data->sfp_gpio_configuration = (gpio_ports[1] << 8) | gpio_ports[0];  in xgbe_read_gpio_expander()
1529 		memset(gpio_ports, 0, sizeof(gpio_ports));  in xgbe_read_gpio_expander()
1544 	axgbe_printf(1, "Input port registers: 0x%x\n", phy_data->sfp_gpio_inputs);  in xgbe_log_gpio_expander()
1545 	axgbe_printf(1, "Output port registers: 0x%x\n", phy_data->sfp_gpio_outputs);  in xgbe_log_gpio_expander()
1546 	axgbe_printf(1, "Polarity port registers: 0x%x\n", phy_data->sfp_gpio_polarity);  in xgbe_log_gpio_expander()
1547 	axgbe_printf(1, "Configuration port registers: 0x%x\n", phy_data->sfp_gpio_configuration);  in xgbe_log_gpio_expander()
1554 	uint8_t gpio_data[3] = {0};  in xgbe_phy_validate_gpio_expander()
1560 	uint16_t config = 0;  in xgbe_phy_validate_gpio_expander()
1561 	int ret = 0;  in xgbe_phy_validate_gpio_expander()
1578 		axgbe_printf(0, "GPIO polarity inverted, resetting\n");  in xgbe_phy_validate_gpio_expander()
1581 		gpio_data[0] = 4; /* polarity register */  in xgbe_phy_validate_gpio_expander()
1599 		gpio_data[0] = 6; /* configuration register */  in xgbe_phy_validate_gpio_expander()
1600 		config = config & ~(0xF << shift); /* clear port id bits */  in xgbe_phy_validate_gpio_expander()
1602 		gpio_data[1] = config & 0xff;  in xgbe_phy_validate_gpio_expander()
1613 		axgbe_printf(0, "GPIO configuration valid\n");  in xgbe_phy_validate_gpio_expander()
1633 	phy_data->sfp_phy_avail = 0;  in xgbe_phy_sfp_mod_absent()
1634 	memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom));  in xgbe_phy_sfp_mod_absent()
1640 	phy_data->sfp_rx_los = 0;  in xgbe_phy_sfp_reset()
1641 	phy_data->sfp_tx_fault = 0;  in xgbe_phy_sfp_reset()
1688 	axgbe_printf(3, "%s: phy speed: 0x%x duplex: 0x%x autoneg: 0x%x "  in xgbe_phy_sfp_detect()
1689 	    "pause_autoneg: 0x%x\n", __func__, pdata->phy.speed,  in xgbe_phy_sfp_detect()
1727 	eeprom_addr = 0;  in xgbe_phy_module_eeprom()
1741 		eeprom_addr = 0;  in xgbe_phy_module_eeprom()
1774 	return (0);  in xgbe_phy_module_info()
1782 	pdata->phy.tx_pause = 0;  in xgbe_phy_phydev_flowctrl()
1783 	pdata->phy.rx_pause = 0;  in xgbe_phy_phydev_flowctrl()
1853 	if (lp_reg & 0x100)  in xgbe_phy_an37_outcome()
1855 	if (lp_reg & 0x80)  in xgbe_phy_an37_outcome()
1858 	axgbe_printf(1, "%s: pause_autoneg %d ad_reg 0x%x lp_reg 0x%x\n",  in xgbe_phy_an37_outcome()
1863 		pdata->phy.tx_pause = 0;  in xgbe_phy_an37_outcome()
1864 		pdata->phy.rx_pause = 0;  in xgbe_phy_an37_outcome()
1866 		if (ad_reg & lp_reg & 0x100) {  in xgbe_phy_an37_outcome()
1869 		} else if (ad_reg & lp_reg & 0x80) {  in xgbe_phy_an37_outcome()
1870 			if (ad_reg & 0x100)  in xgbe_phy_an37_outcome()
1872 			else if (lp_reg & 0x100)  in xgbe_phy_an37_outcome()
1880 	if (lp_reg & 0x20)  in xgbe_phy_an37_outcome()
1885 	mode = (ad_reg & 0x20) ? XGBE_MODE_X : XGBE_MODE_UNKNOWN;  in xgbe_phy_an37_outcome()
1910 	if (lp_reg & 0x80)  in xgbe_phy_an73_redrv_outcome()
1912 	if (lp_reg & 0x20)  in xgbe_phy_an73_redrv_outcome()
1916 	if (ad_reg & 0x80) {  in xgbe_phy_an73_redrv_outcome()
1925 	} else if (ad_reg & 0x20) {  in xgbe_phy_an73_redrv_outcome()
1965 	if (lp_reg & 0xc000)  in xgbe_phy_an73_redrv_outcome()
1983 	if (lp_reg & 0x400)  in xgbe_phy_an73_outcome()
1985 	if (lp_reg & 0x800)  in xgbe_phy_an73_outcome()
1988 	axgbe_printf(1, "%s: pause_autoneg %d ad_reg 0x%x lp_reg 0x%x\n",  in xgbe_phy_an73_outcome()
1993 		pdata->phy.tx_pause = 0;  in xgbe_phy_an73_outcome()
1994 		pdata->phy.rx_pause = 0;  in xgbe_phy_an73_outcome()
1996 		if (ad_reg & lp_reg & 0x400) {  in xgbe_phy_an73_outcome()
1999 		} else if (ad_reg & lp_reg & 0x800) {  in xgbe_phy_an73_outcome()
2000 			if (ad_reg & 0x400)  in xgbe_phy_an73_outcome()
2002 			else if (lp_reg & 0x400)  in xgbe_phy_an73_outcome()
2013 	if (lp_reg & 0x80)  in xgbe_phy_an73_outcome()
2015 	if (lp_reg & 0x20)  in xgbe_phy_an73_outcome()
2019 	if (ad_reg & 0x80)  in xgbe_phy_an73_outcome()
2021 	else if (ad_reg & 0x20)  in xgbe_phy_an73_outcome()
2029 	if (lp_reg & 0xc000)  in xgbe_phy_an73_outcome()
2126 		return (0);  in xgbe_phy_an_config()
2184 	redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000);  in xgbe_phy_set_redrv_mode_mdio()
2200 	redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000);  in xgbe_phy_set_redrv_mode_i2c()
2266 		axgbe_printf(0, "%s: firmware mailbox reset performed\n", __func__);  in xgbe_phy_rx_reset()
2274 	unsigned int s0 = 0;  in xgbe_phy_perform_ratechange()
2291 	XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);  in xgbe_phy_perform_ratechange()
2315 	xgbe_phy_perform_ratechange(pdata, 5, 0);  in xgbe_phy_rrc()
2326 	xgbe_phy_perform_ratechange(pdata, 0, 0);  in xgbe_phy_power_off()
2345 		xgbe_phy_perform_ratechange(pdata, 3, 0);  in xgbe_phy_sfi_mode()
2413 	xgbe_phy_perform_ratechange(pdata, 4, 0);  in xgbe_phy_kr_mode()
2428 	xgbe_phy_perform_ratechange(pdata, 2, 0);  in xgbe_phy_kx_2500_mode()
2676 #if 0  in xgbe_phy_get_type()
2955 	if (reg < 0)  in xgbe_upd_link()
2958 	if ((reg & BMSR_LINK) == 0)  in xgbe_upd_link()
2959 		pdata->phy.link = 0;  in xgbe_upd_link()
2964 	return (0);  in xgbe_upd_link()
2970 	int common_adv_gb = 0;  in xgbe_phy_read_status()
2972 	int lpagb = 0;  in xgbe_phy_read_status()
2987 			if (lpagb < 0)  in xgbe_phy_read_status()
2992 			if (adv < 0)  in xgbe_phy_read_status()
3013 		if (lpa < 0)  in xgbe_phy_read_status()
3020 		if (adv < 0)  in xgbe_phy_read_status()
3027 		pdata->phy.pause = 0;  in xgbe_phy_read_status()
3028 		pdata->phy.asym_pause = 0;  in xgbe_phy_read_status()
3050 			pdata->phy.pause = lpa & ANLPAR_FC ? 1 : 0;  in xgbe_phy_read_status()
3051 			pdata->phy.asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;  in xgbe_phy_read_status()
3055 		if (bmcr < 0)  in xgbe_phy_read_status()
3070 		pdata->phy.pause = 0;  in xgbe_phy_read_status()
3071 		pdata->phy.asym_pause = 0;  in xgbe_phy_read_status()
3077 	return (0);  in xgbe_phy_read_status()
3089 		phy_data->rrc_count = 0;  in xgbe_rrc()
3107 	*an_restart = 0;  in xgbe_phy_link_status()
3117 			return (0);  in xgbe_phy_link_status()
3121 			axgbe_printf(1, "%s: SFP absent 0x%x & sfp_rx_los 0x%x\n",  in xgbe_phy_link_status()
3129 			return (0);  in xgbe_phy_link_status()
3145 			return (0);  in xgbe_phy_link_status()
3152 		ret = (ret < 0) ? ret : (ret & BMSR_ACOMP);  in xgbe_phy_link_status()
3155 			return (0);  in xgbe_phy_link_status()
3170 	axgbe_printf(1, "%s: link_status reg: 0x%x\n", __func__, reg);  in xgbe_phy_link_status()
3177 	return (0);  in xgbe_phy_link_status()
3266 	gpio_data[0] = 2;  in xgbe_phy_i2c_mdio_reset()
3267 	gpio_data[1] = gpio_ports[0];  in xgbe_phy_i2c_mdio_reset()
3302 		return (0);  in xgbe_phy_mdio_reset()
3349 		return (0);  in xgbe_phy_mdio_reset_setup()
3372 	return (0);  in xgbe_phy_mdio_reset_setup()
3489 	phy_data->phy_cdr_notrack = 0;  in xgbe_phy_cdr_track()
3645 		phy_data->sfp_phy_retries = 0;  in xgbe_phy_start()
3660 	return (0);  in xgbe_phy_start()
3683 		return (0);  in xgbe_phy_reset()
3695 	return (0);  in xgbe_phy_reset()
3978 		DBGPR("%s: start %d mode %d adv 0x%x\n", __func__,  in xgbe_phy_init()
3986 	axgbe_printf(2, "%s: start %d mode %d adv 0x%x\n", __func__,  in xgbe_phy_init()
4028 	return (0);  in xgbe_phy_init()