Lines Matching +full:k210 +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/k210-clk.h>
10 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "kendryte,k210";
22 * The K210 has an sv39 MMU following the priviledge specification v1.9.
23 * Since this is a non-ratified draft specification, the kernel does not
24 * support it and the K210 support enabled only for the !MMU case.
28 #address-cells = <1>;
29 #size-cells = <0>;
30 timebase-frequency = <7800000>;
34 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
36 mmu-type = "none";
37 i-cache-size = <0x8000>;
38 i-cache-block-size = <64>;
39 d-cache-size = <0x8000>;
40 d-cache-block-size = <64>;
42 clock-frequency = <390000000>;
43 cpu0_intc: interrupt-controller {
44 #interrupt-cells = <1>;
45 interrupt-controller;
46 compatible = "riscv,cpu-intc";
52 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
54 mmu-type = "none";
55 i-cache-size = <0x8000>;
56 i-cache-block-size = <64>;
57 d-cache-size = <0x8000>;
58 d-cache-block-size = <64>;
60 clock-frequency = <390000000>;
61 cpu1_intc: interrupt-controller {
62 #interrupt-cells = <1>;
63 interrupt-controller;
64 compatible = "riscv,cpu-intc";
74 reg-names = "sram0", "sram1", "aisram";
79 compatible = "fixed-clock";
80 #clock-cells = <0>;
81 clock-frequency = <26000000>;
86 #address-cells = <1>;
87 #size-cells = <1>;
88 compatible = "kendryte,k210-soc", "simple-bus";
90 interrupt-parent = <&plic0>;
93 compatible = "kendryte,k210-sysctl", "simple-mfd";
95 #clock-cells = <1>;
99 #interrupt-cells = <1>;
102 interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
107 plic0: interrupt-controller@c000000 {
108 #interrupt-cells = <1>;
109 interrupt-controller;
110 compatible = "kendryte,k210-plic0", "riscv,plic0";
112 interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 0xffffffff>,
115 riscv,max-priority = <7>;
119 compatible = "kendryte,k210-uarths", "sifive,uart0";