Lines Matching +full:tse +full:- +full:mdio
1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
24 altr,exception-addr = <0xc8000120>;
25 altr,fast-tlb-miss-addr = <0xc0000100>;
26 altr,has-div = <1>;
27 altr,has-initda = <1>;
28 altr,has-mmu = <1>;
29 altr,has-mul = <1>;
31 altr,pid-num-bits = <8>;
32 altr,reset-addr = <0xd4000000>;
33 altr,tlb-num-entries = <256>;
34 altr,tlb-num-ways = <16>;
35 altr,tlb-ptr-sz = <8>;
36 clock-frequency = <75000000>;
37 dcache-line-size = <32>;
38 dcache-size = <32768>;
39 icache-line-size = <32>;
40 icache-size = <32768>;
53 #address-cells = <1>;
54 #size-cells = <1>;
55 compatible = "altr,avalon", "simple-bus";
56 bus-frequency = <75000000>;
59 compatible = "altr,juart-1.0";
61 interrupt-parent = <&cpu>;
66 compatible = "altr,16550-FIFO32", "ns16550a";
68 interrupt-parent = <&cpu>;
70 auto-flow-control = <1>;
71 clock-frequency = <50000000>;
72 fifo-size = <32>;
73 reg-io-width = <4>;
74 reg-shift = <2>;
75 tx-threshold = <16>;
79 compatible = "altr,sysid-1.0";
86 compatible = "altr,tse-msgdma-1.0", "altr,tse-1.0";
93 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
94 interrupt-parent = <&cpu>;
96 interrupt-names = "rx_irq", "tx_irq";
97 rx-fifo-depth = <8192>;
98 tx-fifo-depth = <8192>;
99 address-bits = <48>;
100 max-frame-size = <1500>;
101 local-mac-address = [00 00 00 00 00 00];
102 altr,has-supplementary-unicast;
103 altr,enable-sup-addr = <1>;
104 altr,has-hash-multicast-filter;
105 altr,enable-hash = <1>;
106 phy-mode = "rgmii-id";
107 phy-handle = <&phy0>;
108 rgmii_0_eth_tse_0_mdio: mdio {
109 compatible = "altr,tse-mdio";
110 #address-cells = <1>;
111 #size-cells = <0>;
112 phy0: ethernet-phy@0 {
114 device_type = "ethernet-phy";
120 compatible = "altr,pll-1.0";
121 #clock-cells = <1>;
124 compatible = "fixed-clock";
125 #clock-cells = <0>;
126 clock-frequency = <125000000>;
127 clock-output-names = "enet_pll-c0";
131 compatible = "fixed-clock";
132 #clock-cells = <0>;
133 clock-frequency = <25000000>;
134 clock-output-names = "enet_pll-c1";
138 compatible = "fixed-clock";
139 #clock-cells = <0>;
140 clock-frequency = <2500000>;
141 clock-output-names = "enet_pll-c2";
146 compatible = "altr,pll-1.0";
147 #clock-cells = <1>;
150 compatible = "fixed-clock";
151 #clock-cells = <0>;
152 clock-frequency = <100000000>;
153 clock-output-names = "sys_pll-c0";
157 compatible = "fixed-clock";
158 #clock-cells = <0>;
159 clock-frequency = <50000000>;
160 clock-output-names = "sys_pll-c1";
164 compatible = "fixed-clock";
165 #clock-cells = <0>;
166 clock-frequency = <75000000>;
167 clock-output-names = "sys_pll-c2";
172 compatible = "altr,timer-1.0";
174 interrupt-parent = <&cpu>;
176 clock-frequency = <75000000>;
180 compatible = "altr,pio-1.0";
183 #gpio-cells = <2>;
184 gpio-controller;
188 compatible = "altr,pio-1.0";
190 interrupt-parent = <&cpu>;
193 altr,interrupt-type = <2>;
196 #gpio-cells = <2>;
197 gpio-controller;
201 compatible = "altr,timer-1.0";
203 interrupt-parent = <&cpu>;
205 clock-frequency = <75000000>;
209 compatible = "gpio-leds";
235 stdout-path = &a_16550_uart_0;