Lines Matching +full:brcmnand +full:- +full:v4

1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm63268-clock.h"
4 #include "dt-bindings/reset/bcm63268-reset.h"
5 #include "dt-bindings/soc/bcm63268-pm.h"
8 	#address-cells = <1>;
9 	#size-cells = <1>;
13 		#address-cells = <1>;
14 		#size-cells = <0>;
16 		mips-hpt-frequency = <200000000>;
32 		periph_osc: periph-osc {
33 			compatible = "fixed-clock";
34 			#clock-cells = <0>;
35 			clock-frequency = <50000000>;
36 			clock-output-names = "periph";
39 		hsspi_osc: hsspi-osc {
40 			compatible = "fixed-clock";
42 			#clock-cells = <0>;
44 			clock-frequency = <400000000>;
45 			clock-output-names = "hsspi_osc";
57 	cpu_intc: interrupt-controller {
58 		#address-cells = <0>;
59 		compatible = "mti,cpu-interrupt-controller";
61 		interrupt-controller;
62 		#interrupt-cells = <1>;
66 		#address-cells = <1>;
67 		#size-cells = <1>;
69 		compatible = "simple-bus";
72 		periph_clk: clock-controller@10000004 {
73 			compatible = "brcm,bcm63268-clocks";
75 			#clock-cells = <1>;
81 			native-endian;
84 				compatible = "syscon-reboot";
90 		periph_rst: reset-controller@10000010 {
91 			compatible = "brcm,bcm6345-reset";
93 			#reset-cells = <1>;
96 		periph_intc: interrupt-controller@10000020 {
97 			compatible = "brcm,bcm6345-l1-intc";
101 			interrupt-controller;
102 			#interrupt-cells = <1>;
104 			interrupt-parent = <&cpu_intc>;
108 		timer-mfd@10000080 {
109 			compatible = "brcm,bcm7038-twd", "simple-mfd", "syscon";
112 			#address-cells = <1>;
113 			#size-cells = <1>;
116 				compatible = "brcm,bcm6345-timer";
121 				compatible = "brcm,bcm7038-wdt";
125 				clock-names = "refclk";
127 				timeout-sec = <30>;
132 			compatible = "brcm,bcm6345-uart";
135 			interrupt-parent = <&periph_intc>;
139 			clock-names = "refclk";
145 			#address-cells = <1>;
146 			#size-cells = <0>;
147 			compatible = "brcm,nand-bcm6368",
148 				     "brcm,brcmnand-v4.0",
149 				     "brcm,brcmnand";
153 			reg-names = "nand",
154 				    "nand-cache",
155 				    "nand-int-base";
157 			interrupt-parent = <&periph_intc>;
161 			clock-names = "nand";
167 			compatible = "brcm,bcm6345-uart";
170 			interrupt-parent = <&periph_intc>;
174 			clock-names = "refclk";
180 			#address-cells = <1>;
181 			#size-cells = <0>;
182 			compatible = "brcm,bcm6358-spi";
185 			interrupt-parent = <&periph_intc>;
189 			clock-names = "spi";
197 			#address-cells = <1>;
198 			#size-cells = <0>;
199 			compatible = "brcm,bcm6328-hsspi";
202 			interrupt-parent = <&periph_intc>;
207 			clock-names = "hsspi",
215 		periph_pwr: power-controller@1000184c {
216 			compatible = "brcm,bcm6328-power-controller";
218 			#power-domain-cells = <1>;
221 		leds0: led-controller@10001900 {
222 			#address-cells = <1>;
223 			#size-cells = <0>;
224 			compatible = "brcm,bcm6328-leds";
231 			compatible = "brcm,bcm63268-ehci", "generic-ehci";
233 			big-endian;
235 			interrupt-parent = <&periph_intc>;
239 			phy-names = "usb";
245 			compatible = "brcm,bcm63268-ohci", "generic-ohci";
247 			big-endian;
248 			no-big-frame-no;
250 			interrupt-parent = <&periph_intc>;
254 			phy-names = "usb";
259 		usbh: usb-phy@10002700 {
260 			compatible = "brcm,bcm63268-usbh-phy";
262 			#phy-cells = <1>;
265 			clock-names = "usbh";
267 			power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
270 			reset-names = "usbh";