Lines Matching +full:tslch +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
28 no-map;
31 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
32 compatible = "shared-dma-pool";
34 no-map;
37 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
38 compatible = "shared-dma-pool";
40 no-map;
43 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
44 compatible = "shared-dma-pool";
46 no-map;
49 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
50 compatible = "shared-dma-pool";
52 no-map;
55 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
56 compatible = "shared-dma-pool";
58 no-map;
61 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
62 compatible = "shared-dma-pool";
64 no-map;
67 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
68 compatible = "shared-dma-pool";
70 no-map;
73 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
74 compatible = "shared-dma-pool";
76 no-map;
79 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
80 compatible = "shared-dma-pool";
82 no-map;
85 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
86 compatible = "shared-dma-pool";
88 no-map;
91 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
92 compatible = "shared-dma-pool";
94 no-map;
97 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
98 compatible = "shared-dma-pool";
100 no-map;
103 c66_1_dma_memory_region: c66-dma-memory@a6000000 {
104 compatible = "shared-dma-pool";
106 no-map;
109 c66_0_memory_region: c66-memory@a6100000 {
110 compatible = "shared-dma-pool";
112 no-map;
115 c66_0_dma_memory_region: c66-dma-memory@a7000000 {
116 compatible = "shared-dma-pool";
118 no-map;
121 c66_1_memory_region: c66-memory@a7100000 {
122 compatible = "shared-dma-pool";
124 no-map;
127 c71_0_dma_memory_region: c71-dma-memory@a8000000 {
128 compatible = "shared-dma-pool";
130 no-map;
133 c71_0_memory_region: c71-memory@a8100000 {
134 compatible = "shared-dma-pool";
136 no-map;
139 rtos_ipc_memory_region: ipc-memories@aa000000 {
142 no-map;
148 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
149 pinctrl-single,pins = <
155 pmic_irq_pins_default: pmic-irq-default-pins {
156 pinctrl-single,pins = <
161 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
162 pinctrl-single,pins = <
177 mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
178 pinctrl-single,pins = <
199 pinctrl-names = "default";
200 pinctrl-0 = <&wkup_i2c0_pins_default>;
201 clock-frequency = <400000>;
204 /* CAV24C256WE-GT3 */
210 compatible = "ti,tps6594-q1";
212 system-power-controller;
213 pinctrl-names = "default";
214 pinctrl-0 = <&pmic_irq_pins_default>;
215 interrupt-parent = <&wkup_gpio0>;
217 gpio-controller;
218 #gpio-cells = <2>;
219 ti,primary-pmic;
220 buck12-supply = <&vsys_3v3>;
221 buck3-supply = <&vsys_3v3>;
222 buck4-supply = <&vsys_3v3>;
223 buck5-supply = <&vsys_3v3>;
224 ldo1-supply = <&vsys_3v3>;
225 ldo2-supply = <&vsys_3v3>;
226 ldo3-supply = <&vsys_3v3>;
227 ldo4-supply = <&vsys_3v3>;
231 regulator-name = "vdd_cpu_avs";
232 regulator-min-microvolt = <600000>;
233 regulator-max-microvolt = <900000>;
234 regulator-boot-on;
235 regulator-always-on;
236 bootph-pre-ram;
240 regulator-name = "vdd_mcu_0v85";
241 regulator-min-microvolt = <850000>;
242 regulator-max-microvolt = <850000>;
243 regulator-boot-on;
244 regulator-always-on;
248 regulator-name = "vdd_ddr_1v1";
249 regulator-min-microvolt = <1100000>;
250 regulator-max-microvolt = <1100000>;
251 regulator-boot-on;
252 regulator-always-on;
256 regulator-name = "vdd_phyio_1v8";
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <1800000>;
259 regulator-boot-on;
260 regulator-always-on;
264 regulator-name = "vdd1_lpddr4_1v8";
265 regulator-min-microvolt = <1800000>;
266 regulator-max-microvolt = <1800000>;
267 regulator-boot-on;
268 regulator-always-on;
272 regulator-name = "vdd_mcuio_1v8";
273 regulator-min-microvolt = <1800000>;
274 regulator-max-microvolt = <1800000>;
275 regulator-boot-on;
276 regulator-always-on;
280 regulator-name = "vdda_dll_0v8";
281 regulator-min-microvolt = <800000>;
282 regulator-max-microvolt = <800000>;
283 regulator-boot-on;
284 regulator-always-on;
288 regulator-name = "vda_mcu_1v8";
289 regulator-min-microvolt = <1800000>;
290 regulator-max-microvolt = <1800000>;
291 regulator-boot-on;
292 regulator-always-on;
298 compatible = "ti,tps6594-q1";
300 system-power-controller;
301 interrupt-parent = <&wkup_gpio0>;
303 gpio-controller;
304 #gpio-cells = <2>;
305 buck1234-supply = <&vsys_3v3>;
306 buck5-supply = <&vsys_3v3>;
307 ldo1-supply = <&vsys_3v3>;
308 ldo2-supply = <&vsys_3v3>;
309 ldo3-supply = <&vsys_3v3>;
310 ldo4-supply = <&vsys_3v3>;
314 regulator-name = "vdd_core_0v8";
315 regulator-min-microvolt = <800000>;
316 regulator-max-microvolt = <800000>;
317 regulator-boot-on;
318 regulator-always-on;
322 regulator-name = "vdd_ram_0v85";
323 regulator-min-microvolt = <850000>;
324 regulator-max-microvolt = <850000>;
325 regulator-boot-on;
326 regulator-always-on;
330 regulator-name = "vdd_sd_dv";
331 regulator-min-microvolt = <1800000>;
332 regulator-max-microvolt = <3300000>;
333 regulator-boot-on;
334 regulator-always-on;
338 regulator-name = "vdd_usb_3v3";
339 regulator-min-microvolt = <3300000>;
340 regulator-max-microvolt = <3300000>;
341 regulator-boot-on;
342 regulator-always-on;
346 regulator-name = "vdd_io_1v8";
347 regulator-min-microvolt = <1800000>;
348 regulator-max-microvolt = <1800000>;
349 regulator-boot-on;
350 regulator-always-on;
354 regulator-name = "vda_pll_1v8";
355 regulator-min-microvolt = <1800000>;
356 regulator-max-microvolt = <1800000>;
357 regulator-boot-on;
358 regulator-always-on;
366 pinctrl-names = "default";
367 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
370 compatible = "jedec,spi-nor";
372 spi-tx-bus-width = <8>;
373 spi-rx-bus-width = <8>;
374 spi-max-frequency = <25000000>;
375 cdns,tshsl-ns = <60>;
376 cdns,tsd2d-ns = <60>;
377 cdns,tchsh-ns = <60>;
378 cdns,tslch-ns = <60>;
379 cdns,read-delay = <0>;
382 compatible = "fixed-partitions";
383 #address-cells = <1>;
384 #size-cells = <1>;
397 label = "ospi.u-boot";
434 pinctrl-names = "default";
435 pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
440 compatible = "cypress,hyperflash", "cfi-flash";
444 compatible = "fixed-partitions";
445 #address-cells = <1>;
446 #size-cells = <1>;
459 label = "hbmc.u-boot";
485 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
486 ti,mbox-rx = <0 0 0>;
487 ti,mbox-tx = <1 0 0>;
490 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
491 ti,mbox-rx = <2 0 0>;
492 ti,mbox-tx = <3 0 0>;
500 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
501 ti,mbox-rx = <0 0 0>;
502 ti,mbox-tx = <1 0 0>;
505 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
506 ti,mbox-rx = <2 0 0>;
507 ti,mbox-tx = <3 0 0>;
515 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
516 ti,mbox-rx = <0 0 0>;
517 ti,mbox-tx = <1 0 0>;
520 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
521 ti,mbox-rx = <2 0 0>;
522 ti,mbox-tx = <3 0 0>;
530 mbox_c66_0: mbox-c66-0 {
531 ti,mbox-rx = <0 0 0>;
532 ti,mbox-tx = <1 0 0>;
535 mbox_c66_1: mbox-c66-1 {
536 ti,mbox-rx = <2 0 0>;
537 ti,mbox-tx = <3 0 0>;
545 mbox_c71_0: mbox-c71-0 {
546 ti,mbox-rx = <0 0 0>;
547 ti,mbox-tx = <1 0 0>;
553 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
559 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
565 memory-region = <&main_r5fss0_core0_dma_memory_region>,
571 memory-region = <&main_r5fss0_core1_dma_memory_region>,
577 memory-region = <&main_r5fss1_core0_dma_memory_region>,
583 memory-region = <&main_r5fss1_core1_dma_memory_region>,
590 memory-region = <&c66_0_dma_memory_region>,
597 memory-region = <&c66_1_dma_memory_region>,
604 memory-region = <&c71_0_dma_memory_region>,