Lines Matching +full:bank +full:- +full:ioport
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
13 #address-cells = <1>;
14 #size-cells = <0>;
17 compatible = "arm,cortex-a35";
20 enable-method = "psci";
24 arm-pmu {
25 compatible = "arm,cortex-a35-pmu";
27 interrupt-affinity = <&cpu0>;
28 interrupt-parent = <&intc>;
32 compatible = "arm,smc-wdt";
33 arm,smc-id = <0xb200005a>;
38 ck_flexgen_08: ck-flexgen-08 {
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <100000000>;
44 ck_flexgen_51: ck-flexgen-51 {
45 #clock-cells = <0>;
46 compatible = "fixed-clock";
47 clock-frequency = <200000000>;
50 ck_icn_ls_mcu: ck-icn-ls-mcu {
51 #clock-cells = <0>;
52 compatible = "fixed-clock";
53 clock-frequency = <200000000>;
59 compatible = "linaro,optee-tz";
64 compatible = "linaro,scmi-optee";
65 #address-cells = <1>;
66 #size-cells = <0>;
67 linaro,optee-channel-id = <0>;
71 #clock-cells = <1>;
76 #reset-cells = <1>;
81 intc: interrupt-controller@4ac00000 {
82 compatible = "arm,cortex-a7-gic";
83 #interrupt-cells = <3>;
84 #address-cells = <1>;
85 interrupt-controller;
93 compatible = "arm,psci-1.0";
98 compatible = "arm,armv8-timer";
99 interrupt-parent = <&intc>;
104 always-on;
108 compatible = "simple-bus";
109 #address-cells = <1>;
110 #size-cells = <1>;
111 interrupt-parent = <&intc>;
114 rifsc: rifsc-bus@42080000 {
115 compatible = "simple-bus";
117 #address-cells = <1>;
118 #size-cells = <1>;
122 compatible = "st,stm32h7-uart";
130 compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
131 arm,primecell-periphid = <0x00353180>;
135 clock-names = "apb_pclk";
136 cap-sd-highspeed;
137 cap-mmc-highspeed;
138 max-frequency = <120000000>;
144 compatible = "st,stm32mp25-bsec";
146 #address-cells = <1>;
147 #size-cells = <1>;
160 compatible = "st,stm32mp25-syscfg", "syscon";
165 #address-cells = <1>;
166 #size-cells = <1>;
167 compatible = "st,stm32mp257-pinctrl";
169 pins-are-numbered;
172 gpio-controller;
173 #gpio-cells = <2>;
174 interrupt-controller;
175 #interrupt-cells = <2>;
178 st,bank-name = "GPIOA";
183 gpio-controller;
184 #gpio-cells = <2>;
185 interrupt-controller;
186 #interrupt-cells = <2>;
189 st,bank-name = "GPIOB";
194 gpio-controller;
195 #gpio-cells = <2>;
196 interrupt-controller;
197 #interrupt-cells = <2>;
200 st,bank-name = "GPIOC";
205 gpio-controller;
206 #gpio-cells = <2>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
211 st,bank-name = "GPIOD";
216 gpio-controller;
217 #gpio-cells = <2>;
218 interrupt-controller;
219 #interrupt-cells = <2>;
222 st,bank-name = "GPIOE";
227 gpio-controller;
228 #gpio-cells = <2>;
229 interrupt-controller;
230 #interrupt-cells = <2>;
233 st,bank-name = "GPIOF";
238 gpio-controller;
239 #gpio-cells = <2>;
240 interrupt-controller;
241 #interrupt-cells = <2>;
244 st,bank-name = "GPIOG";
249 gpio-controller;
250 #gpio-cells = <2>;
251 interrupt-controller;
252 #interrupt-cells = <2>;
255 st,bank-name = "GPIOH";
260 gpio-controller;
261 #gpio-cells = <2>;
262 interrupt-controller;
263 #interrupt-cells = <2>;
266 st,bank-name = "GPIOI";
271 gpio-controller;
272 #gpio-cells = <2>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
277 st,bank-name = "GPIOJ";
282 gpio-controller;
283 #gpio-cells = <2>;
284 interrupt-controller;
285 #interrupt-cells = <2>;
288 st,bank-name = "GPIOK";
294 #address-cells = <1>;
295 #size-cells = <1>;
296 compatible = "st,stm32mp257-z-pinctrl";
298 pins-are-numbered;
301 gpio-controller;
302 #gpio-cells = <2>;
303 interrupt-controller;
304 #interrupt-cells = <2>;
307 st,bank-name = "GPIOZ";
308 st,bank-ioport = <11>;