Lines Matching +full:canfd +full:- +full:2
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g044-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
27 clock-frequency = <0>;
30 /* External CAN clock - to be overridden by boards that provide it */
31 can_clk: can-clk {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
38 extal_clk: extal-clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-150000000 {
50 opp-hz = /bits/ 64 <150000000>;
51 opp-microvolt = <1100000>;
52 clock-latency-ns = <300000>;
54 opp-300000000 {
55 opp-hz = /bits/ 64 <300000000>;
56 opp-microvolt = <1100000>;
57 clock-latency-ns = <300000>;
59 opp-600000000 {
60 opp-hz = /bits/ 64 <600000000>;
61 opp-microvolt = <1100000>;
62 clock-latency-ns = <300000>;
64 opp-1200000000 {
65 opp-hz = /bits/ 64 <1200000000>;
66 opp-microvolt = <1100000>;
67 clock-latency-ns = <300000>;
68 opp-suspend;
73 #address-cells = <1>;
74 #size-cells = <0>;
76 cpu-map {
88 compatible = "arm,cortex-a55";
91 #cooling-cells = <2>;
92 next-level-cache = <&L3_CA55>;
93 enable-method = "psci";
95 operating-points-v2 = <&cluster0_opp>;
99 compatible = "arm,cortex-a55";
102 next-level-cache = <&L3_CA55>;
103 enable-method = "psci";
105 operating-points-v2 = <&cluster0_opp>;
108 L3_CA55: cache-controller-0 {
110 cache-unified;
111 cache-size = <0x40000>;
112 cache-level = <3>;
116 gpu_opp_table: opp-table-1 {
117 compatible = "operating-points-v2";
119 opp-500000000 {
120 opp-hz = /bits/ 64 <500000000>;
121 opp-microvolt = <1100000>;
124 opp-400000000 {
125 opp-hz = /bits/ 64 <400000000>;
126 opp-microvolt = <1100000>;
129 opp-250000000 {
130 opp-hz = /bits/ 64 <250000000>;
131 opp-microvolt = <1100000>;
134 opp-200000000 {
135 opp-hz = /bits/ 64 <200000000>;
136 opp-microvolt = <1100000>;
139 opp-125000000 {
140 opp-hz = /bits/ 64 <125000000>;
141 opp-microvolt = <1100000>;
144 opp-100000000 {
145 opp-hz = /bits/ 64 <100000000>;
146 opp-microvolt = <1100000>;
149 opp-62500000 {
150 opp-hz = /bits/ 64 <62500000>;
151 opp-microvolt = <1100000>;
154 opp-50000000 {
155 opp-hz = /bits/ 64 <50000000>;
156 opp-microvolt = <1100000>;
161 compatible = "arm,cortex-a55-pmu";
162 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
166 compatible = "arm,psci-1.0", "arm,psci-0.2";
171 compatible = "simple-bus";
172 interrupt-parent = <&gic>;
173 #address-cells = <2>;
174 #size-cells = <2>;
178 compatible = "renesas,r9a07g044-mtu3",
179 "renesas,rz-mtu3";
225 interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
241 power-domains = <&cpg>;
243 #pwm-cells = <2>;
248 compatible = "renesas,r9a07g044-ssi",
249 "renesas,rz-ssi";
254 interrupt-names = "int_req", "dma_rx", "dma_tx";
258 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
261 dma-names = "tx", "rx";
262 power-domains = <&cpg>;
263 #sound-dai-cells = <0>;
268 compatible = "renesas,r9a07g044-ssi",
269 "renesas,rz-ssi";
274 interrupt-names = "int_req", "dma_rx", "dma_tx";
278 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
281 dma-names = "tx", "rx";
282 power-domains = <&cpg>;
283 #sound-dai-cells = <0>;
288 compatible = "renesas,r9a07g044-ssi",
289 "renesas,rz-ssi";
293 interrupt-names = "int_req", "dma_rt";
297 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
300 dma-names = "rt";
301 power-domains = <&cpg>;
302 #sound-dai-cells = <0>;
307 compatible = "renesas,r9a07g044-ssi",
308 "renesas,rz-ssi";
313 interrupt-names = "int_req", "dma_rx", "dma_tx";
317 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
320 dma-names = "tx", "rx";
321 power-domains = <&cpg>;
322 #sound-dai-cells = <0>;
327 compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
332 interrupt-names = "error", "rx", "tx";
336 dma-names = "tx", "rx";
337 power-domains = <&cpg>;
338 num-cs = <1>;
339 #address-cells = <1>;
340 #size-cells = <0>;
345 compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
350 interrupt-names = "error", "rx", "tx";
354 dma-names = "tx", "rx";
355 power-domains = <&cpg>;
356 num-cs = <1>;
357 #address-cells = <1>;
358 #size-cells = <0>;
363 compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
368 interrupt-names = "error", "rx", "tx";
372 dma-names = "tx", "rx";
373 power-domains = <&cpg>;
374 num-cs = <1>;
375 #address-cells = <1>;
376 #size-cells = <0>;
381 compatible = "renesas,scif-r9a07g044";
389 interrupt-names = "eri", "rxi", "txi",
392 clock-names = "fck";
393 power-domains = <&cpg>;
399 compatible = "renesas,scif-r9a07g044";
407 interrupt-names = "eri", "rxi", "txi",
410 clock-names = "fck";
411 power-domains = <&cpg>;
417 compatible = "renesas,scif-r9a07g044";
425 interrupt-names = "eri", "rxi", "txi",
428 clock-names = "fck";
429 power-domains = <&cpg>;
435 compatible = "renesas,scif-r9a07g044";
443 interrupt-names = "eri", "rxi", "txi",
446 clock-names = "fck";
447 power-domains = <&cpg>;
453 compatible = "renesas,scif-r9a07g044";
461 interrupt-names = "eri", "rxi", "txi",
464 clock-names = "fck";
465 power-domains = <&cpg>;
471 compatible = "renesas,r9a07g044-sci", "renesas,sci";
477 interrupt-names = "eri", "rxi", "txi", "tei";
479 clock-names = "fck";
480 power-domains = <&cpg>;
486 compatible = "renesas,r9a07g044-sci", "renesas,sci";
492 interrupt-names = "eri", "rxi", "txi", "tei";
494 clock-names = "fck";
495 power-domains = <&cpg>;
500 canfd: can@10050000 { label
501 compatible = "renesas,r9a07g044-canfd", "renesas,rzg2l-canfd";
511 interrupt-names = "g_err", "g_recc",
517 clock-names = "fck", "canfd", "can_clk";
518 assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>;
519 assigned-clock-rates = <50000000>;
522 reset-names = "rstp_n", "rstc_n";
523 power-domains = <&cpg>;
535 #address-cells = <1>;
536 #size-cells = <0>;
537 compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
547 interrupt-names = "tei", "ri", "ti", "spi", "sti",
550 clock-frequency = <100000>;
552 power-domains = <&cpg>;
557 #address-cells = <1>;
558 #size-cells = <0>;
559 compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
569 interrupt-names = "tei", "ri", "ti", "spi", "sti",
572 clock-frequency = <100000>;
574 power-domains = <&cpg>;
579 #address-cells = <1>;
580 #size-cells = <0>;
581 compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
591 interrupt-names = "tei", "ri", "ti", "spi", "sti",
594 clock-frequency = <100000>;
596 power-domains = <&cpg>;
601 #address-cells = <1>;
602 #size-cells = <0>;
603 compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
613 interrupt-names = "tei", "ri", "ti", "spi", "sti",
616 clock-frequency = <100000>;
618 power-domains = <&cpg>;
623 compatible = "renesas,r9a07g044-adc", "renesas,rzg2l-adc";
628 clock-names = "adclk", "pclk";
631 reset-names = "presetn", "adrst-n";
632 power-domains = <&cpg>;
635 #address-cells = <1>;
636 #size-cells = <0>;
644 channel@2 {
645 reg = <2>;
665 compatible = "renesas,r9a07g044-tsu",
666 "renesas,rzg2l-tsu";
670 power-domains = <&cpg>;
671 #thermal-sensor-cells = <1>;
675 compatible = "renesas,r9a07g044-rpc-if",
676 "renesas,rzg2l-rpc-if";
680 reg-names = "regs", "dirmap", "wbuf";
685 power-domains = <&cpg>;
686 #address-cells = <1>;
687 #size-cells = <0>;
692 compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru";
697 clock-names = "video", "apb", "axi";
701 interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
704 reset-names = "presetn", "aresetn";
705 power-domains = <&cpg>;
709 #address-cells = <1>;
710 #size-cells = <0>;
713 #address-cells = <1>;
714 #size-cells = <0>;
723 #address-cells = <1>;
724 #size-cells = <0>;
729 remote-endpoint = <&csi2cru>;
736 compatible = "renesas,r9a07g044-csi2", "renesas,rzg2l-csi2";
742 clock-names = "system", "video", "apb";
745 reset-names = "presetn", "cmn-rstb";
746 power-domains = <&cpg>;
750 #address-cells = <1>;
751 #size-cells = <0>;
758 #address-cells = <1>;
759 #size-cells = <0>;
764 remote-endpoint = <&crucsi2>;
771 compatible = "renesas,r9a07g044-mipi-dsi",
772 "renesas,rzg2l-mipi-dsi";
781 interrupt-names = "seq0", "seq1", "vin1", "rcv",
789 clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
793 reset-names = "rst", "arst", "prst";
794 power-domains = <&cpg>;
799 compatible = "renesas,r9a07g044-vsp2";
805 clock-names = "aclk", "pclk", "vclk";
806 power-domains = <&cpg>;
812 compatible = "renesas,r9a07g044-fcpvd",
818 clock-names = "aclk", "pclk", "vclk";
819 power-domains = <&cpg>;
823 cpg: clock-controller@11010000 {
824 compatible = "renesas,r9a07g044-cpg";
827 clock-names = "extal";
828 #clock-cells = <2>;
829 #reset-cells = <1>;
830 #power-domain-cells = <0>;
833 sysc: system-controller@11020000 {
834 compatible = "renesas,r9a07g044-sysc";
840 interrupt-names = "lpm_int", "ca55stbydone_int",
846 compatible = "renesas,r9a07g044-pinctrl";
848 gpio-controller;
849 #gpio-cells = <2>;
850 #interrupt-cells = <2>;
851 interrupt-parent = <&irqc>;
852 interrupt-controller;
853 gpio-ranges = <&pinctrl 0 0 392>;
855 power-domains = <&cpg>;
861 irqc: interrupt-controller@110a0000 {
862 compatible = "renesas,r9a07g044-irqc",
863 "renesas,rzg2l-irqc";
864 #interrupt-cells = <2>;
865 #address-cells = <0>;
866 interrupt-controller;
870 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
911 clock-names = "clk", "pclk";
912 power-domains = <&cpg>;
916 dmac: dma-controller@11820000 {
917 compatible = "renesas,r9a07g044-dmac",
918 "renesas,rz-dmac";
938 interrupt-names = "error",
945 clock-names = "main", "register";
946 power-domains = <&cpg>;
949 reset-names = "arst", "rst_async";
950 #dma-cells = <1>;
951 dma-channels = <16>;
955 compatible = "renesas,r9a07g044-mali",
956 "arm,mali-bifrost";
962 interrupt-names = "job", "mmu", "gpu", "event";
966 clock-names = "gpu", "bus", "bus_ace";
967 power-domains = <&cpg>;
971 reset-names = "rst", "axi_rst", "ace_rst";
972 operating-points-v2 = <&gpu_opp_table>;
975 gic: interrupt-controller@11900000 {
976 compatible = "arm,gic-v3";
977 #interrupt-cells = <3>;
978 #address-cells = <0>;
979 interrupt-controller;
986 compatible = "renesas,sdhi-r9a07g044",
987 "renesas,rcar-gen3-sdhi";
995 clock-names = "core", "clkh", "cd", "aclk";
997 power-domains = <&cpg>;
1002 compatible = "renesas,sdhi-r9a07g044",
1003 "renesas,rcar-gen3-sdhi";
1011 clock-names = "core", "clkh", "cd", "aclk";
1013 power-domains = <&cpg>;
1018 compatible = "renesas,r9a07g044-gbeth",
1019 "renesas,rzg2l-gbeth";
1024 interrupt-names = "mux", "fil", "arp_ns";
1025 phy-mode = "rgmii";
1029 clock-names = "axi", "chi", "refclk";
1031 power-domains = <&cpg>;
1032 #address-cells = <1>;
1033 #size-cells = <0>;
1038 compatible = "renesas,r9a07g044-gbeth",
1039 "renesas,rzg2l-gbeth";
1044 interrupt-names = "mux", "fil", "arp_ns";
1045 phy-mode = "rgmii";
1049 clock-names = "axi", "chi", "refclk";
1051 power-domains = <&cpg>;
1052 #address-cells = <1>;
1053 #size-cells = <0>;
1057 phyrst: usbphy-ctrl@11c40000 {
1058 compatible = "renesas,r9a07g044-usbphy-ctrl",
1059 "renesas,rzg2l-usbphy-ctrl";
1063 power-domains = <&cpg>;
1064 #reset-cells = <1>;
1069 compatible = "generic-ohci";
1077 phy-names = "usb";
1078 power-domains = <&cpg>;
1083 compatible = "generic-ohci";
1091 phy-names = "usb";
1092 power-domains = <&cpg>;
1097 compatible = "generic-ehci";
1104 phys = <&usb2_phy0 2>;
1105 phy-names = "usb";
1107 power-domains = <&cpg>;
1112 compatible = "generic-ehci";
1119 phys = <&usb2_phy1 2>;
1120 phy-names = "usb";
1122 power-domains = <&cpg>;
1126 usb2_phy0: usb-phy@11c50200 {
1127 compatible = "renesas,usb2-phy-r9a07g044",
1128 "renesas,rzg2l-usb2-phy";
1134 #phy-cells = <1>;
1135 power-domains = <&cpg>;
1139 usb2_phy1: usb-phy@11c70200 {
1140 compatible = "renesas,usb2-phy-r9a07g044",
1141 "renesas,rzg2l-usb2-phy";
1147 #phy-cells = <1>;
1148 power-domains = <&cpg>;
1153 compatible = "renesas,usbhs-r9a07g044",
1154 "renesas,rza2-usbhs";
1166 phy-names = "usb";
1167 power-domains = <&cpg>;
1172 compatible = "renesas,r9a07g044-wdt",
1173 "renesas,rzg2l-wdt";
1177 clock-names = "pclk", "oscclk";
1180 interrupt-names = "wdt", "perrout";
1182 power-domains = <&cpg>;
1187 compatible = "renesas,r9a07g044-wdt",
1188 "renesas,rzg2l-wdt";
1192 clock-names = "pclk", "oscclk";
1195 interrupt-names = "wdt", "perrout";
1197 power-domains = <&cpg>;
1202 compatible = "renesas,r9a07g044-ostm",
1208 power-domains = <&cpg>;
1213 compatible = "renesas,r9a07g044-ostm",
1219 power-domains = <&cpg>;
1224 compatible = "renesas,r9a07g044-ostm",
1230 power-domains = <&cpg>;
1235 thermal-zones {
1236 cpu-thermal {
1237 polling-delay-passive = <250>;
1238 polling-delay = <1000>;
1239 thermal-sensors = <&tsu 0>;
1240 sustainable-power = <717>;
1242 cooling-maps {
1245 cooling-device = <&cpu0 0 2>;
1251 sensor_crit: sensor-crit {
1257 target: trip-point {
1267 compatible = "arm,armv8-timer";
1268 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,