Lines Matching +full:0 +full:xec5a0000
18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
67 #size-cells = <0>;
69 a53_0: cpu@0 {
71 reg = <0>;
95 L2_CA53: cache-controller-0 {
105 CPU_SLEEP_0: cpu-sleep-0 {
107 arm,psci-suspend-param = <0x0010000>;
118 #clock-cells = <0>;
120 clock-frequency = <0>;
126 #clock-cells = <0>;
127 clock-frequency = <0>;
145 #clock-cells = <0>;
146 clock-frequency = <0>;
159 reg = <0 0xe6020000 0 0x0c>;
170 reg = <0 0xe6050000 0 0x50>;
174 gpio-ranges = <&pfc 0 0 18>;
185 reg = <0 0xe6051000 0 0x50>;
189 gpio-ranges = <&pfc 0 32 23>;
200 reg = <0 0xe6052000 0 0x50>;
204 gpio-ranges = <&pfc 0 64 26>;
215 reg = <0 0xe6053000 0 0x50>;
219 gpio-ranges = <&pfc 0 96 16>;
230 reg = <0 0xe6054000 0 0x50>;
234 gpio-ranges = <&pfc 0 128 11>;
245 reg = <0 0xe6055000 0 0x50>;
249 gpio-ranges = <&pfc 0 160 20>;
260 reg = <0 0xe6055400 0 0x50>;
264 gpio-ranges = <&pfc 0 192 18>;
274 reg = <0 0xe6060000 0 0x508>;
279 #size-cells = <0>;
283 reg = <0 0xe60b0000 0 0x425>;
288 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
296 reg = <0 0xe60f0000 0 0x1004>;
309 reg = <0 0xe6130000 0 0x1004>;
328 reg = <0 0xe6140000 0 0x1004>;
347 reg = <0 0xe6148000 0 0x1004>;
365 reg = <0 0xe6150000 0 0x1000>;
369 #power-domain-cells = <0>;
375 reg = <0 0xe6160000 0 0x0200>;
380 reg = <0 0xe6180000 0 0x0400>;
386 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
393 #thermal-sensor-cells = <0>;
400 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
414 reg = <0 0xe61e0000 0 0x30>;
427 reg = <0 0xe6fc0000 0 0x30>;
440 reg = <0 0xe6fd0000 0 0x30>;
453 reg = <0 0xe6fe0000 0 0x30>;
466 reg = <0 0xffc00000 0 0x30>;
479 #size-cells = <0>;
482 reg = <0 0xe6500000 0 0x40>;
487 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
488 <&dmac2 0x91>, <&dmac2 0x90>;
496 #size-cells = <0>;
499 reg = <0 0xe6508000 0 0x40>;
504 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
505 <&dmac2 0x93>, <&dmac2 0x92>;
513 #size-cells = <0>;
516 reg = <0 0xe6510000 0 0x40>;
521 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
522 <&dmac2 0x95>, <&dmac2 0x94>;
530 #size-cells = <0>;
533 reg = <0 0xe66d0000 0 0x40>;
538 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
546 #size-cells = <0>;
549 reg = <0 0xe66d8000 0 0x40>;
554 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
562 #size-cells = <0>;
565 reg = <0 0xe66e0000 0 0x40>;
570 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
578 #size-cells = <0>;
581 reg = <0 0xe66e8000 0 0x40>;
586 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
594 #size-cells = <0>;
597 reg = <0 0xe6690000 0 0x40>;
610 reg = <0 0xe6540000 0 0x60>;
616 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
617 <&dmac2 0x31>, <&dmac2 0x30>;
628 reg = <0 0xe6550000 0 0x60>;
634 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
635 <&dmac2 0x33>, <&dmac2 0x32>;
646 reg = <0 0xe6560000 0 0x60>;
652 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
653 <&dmac2 0x35>, <&dmac2 0x34>;
664 reg = <0 0xe66a0000 0 0x60>;
670 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
681 reg = <0 0xe66b0000 0 0x60>;
687 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
697 reg = <0 0xe6590000 0 0x200>;
700 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
701 <&usb_dmac1 0>, <&usb_dmac1 1>;
714 reg = <0 0xe65a0000 0 0x100>;
728 reg = <0 0xe65b0000 0 0x100>;
742 reg = <0x0 0xe6601000 0 0x1000>;
751 reg = <0 0xe6700000 0 0x10000>;
780 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
793 reg = <0 0xe7300000 0 0x10000>;
822 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
835 reg = <0 0xe7310000 0 0x10000>;
876 reg = <0 0xe6740000 0 0x1000>;
877 renesas,ipmmu-main = <&ipmmu_mm 0>;
884 reg = <0 0xe7740000 0 0x1000>;
892 reg = <0 0xe6570000 0 0x1000>;
900 reg = <0 0xe67b0000 0 0x1000>;
909 reg = <0 0xec670000 0 0x1000>;
917 reg = <0 0xfd800000 0 0x1000>;
925 reg = <0 0xffc80000 0 0x1000>;
933 reg = <0 0xfe6b0000 0 0x1000>;
941 reg = <0 0xfebd0000 0 0x1000>;
949 reg = <0 0xfe990000 0 0x1000>;
958 reg = <0 0xe6800000 0 0x800>;
996 rx-internal-delay-ps = <0>;
999 #size-cells = <0>;
1006 reg = <0 0xe6c30000 0 0x1000>;
1022 reg = <0 0xe6c38000 0 0x1000>;
1038 reg = <0 0xe66c0000 0 0x8000>;
1063 reg = <0 0xe6e30000 0 0x8>;
1073 reg = <0 0xe6e31000 0 0x8>;
1083 reg = <0 0xe6e32000 0 0x8>;
1093 reg = <0 0xe6e33000 0 0x8>;
1103 reg = <0 0xe6e34000 0 0x8>;
1113 reg = <0 0xe6e35000 0 0x8>;
1123 reg = <0 0xe6e36000 0 0x8>;
1134 reg = <0 0xe6e60000 0 64>;
1140 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1141 <&dmac2 0x51>, <&dmac2 0x50>;
1151 reg = <0 0xe6e68000 0 64>;
1157 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1158 <&dmac2 0x53>, <&dmac2 0x52>;
1168 reg = <0 0xe6e88000 0 64>;
1174 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1175 <&dmac2 0x13>, <&dmac2 0x12>;
1185 reg = <0 0xe6c50000 0 64>;
1191 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1201 reg = <0 0xe6c40000 0 64>;
1207 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1217 reg = <0 0xe6f30000 0 64>;
1223 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1233 reg = <0 0xe6e90000 0 0x0064>;
1236 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1237 <&dmac2 0x41>, <&dmac2 0x40>;
1242 #size-cells = <0>;
1249 reg = <0 0xe6ea0000 0 0x0064>;
1252 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1257 #size-cells = <0>;
1264 reg = <0 0xe6c00000 0 0x0064>;
1267 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1272 #size-cells = <0>;
1279 reg = <0 0xe6c10000 0 0x0064>;
1282 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1287 #size-cells = <0>;
1293 reg = <0 0xe6ef4000 0 0x1000>;
1303 #size-cells = <0>;
1307 #size-cells = <0>;
1321 reg = <0 0xe6ef5000 0 0x1000>;
1331 #size-cells = <0>;
1335 #size-cells = <0>;
1350 reg = <0 0xe6f40000 0 0x84>;
1354 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1365 reg = <0 0xe6f50000 0 0x84>;
1369 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1380 reg = <0 0xe6f60000 0 0x84>;
1384 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1395 reg = <0 0xe6f70000 0 0x84>;
1399 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1410 reg = <0 0xe6f80000 0 0x84>;
1414 dmas = <&dmac0 0x28>;
1425 reg = <0 0xe6f90000 0 0x84>;
1429 dmas = <&dmac0 0x2a>;
1440 reg = <0 0xe6fa0000 0 0x84>;
1444 dmas = <&dmac0 0x2c>;
1455 reg = <0 0xe6fb0000 0 0x84>;
1459 dmas = <&dmac0 0x2e>;
1471 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1477 * clkout : #clock-cells = <0>; <&rcar_sound>;
1481 reg = <0 0xec500000 0 0x1000>, /* SCU */
1482 <0 0xec5a0000 0 0x100>, /* ADG */
1483 <0 0xec540000 0 0x1000>, /* SSIU */
1484 <0 0xec541000 0 0x280>, /* SSI */
1485 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1508 "ssi.1", "ssi.0",
1511 "src.1", "src.0",
1512 "mix.1", "mix.0",
1513 "ctu.1", "ctu.0",
1514 "dvc.0", "dvc.1",
1526 "ssi.1", "ssi.0";
1530 ctu00: ctu-0 { };
1541 dvc0: dvc-0 {
1542 dmas = <&audma0 0xbc>;
1546 dmas = <&audma0 0xbe>;
1552 mix0: mix-0 { };
1557 src0: src-0 {
1559 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1564 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1569 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1574 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1579 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1584 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1589 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1594 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1599 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1604 dmas = <&audma0 0x97>, <&audma0 0xba>;
1610 ssi0: ssi-0 {
1612 dmas = <&audma0 0x01>, <&audma0 0x02>,
1613 <&audma0 0x15>, <&audma0 0x16>;
1618 dmas = <&audma0 0x03>, <&audma0 0x04>,
1619 <&audma0 0x49>, <&audma0 0x4a>;
1624 dmas = <&audma0 0x05>, <&audma0 0x06>,
1625 <&audma0 0x63>, <&audma0 0x64>;
1630 dmas = <&audma0 0x07>, <&audma0 0x08>,
1631 <&audma0 0x6f>, <&audma0 0x70>;
1636 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1637 <&audma0 0x71>, <&audma0 0x72>;
1642 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1643 <&audma0 0x73>, <&audma0 0x74>;
1648 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1649 <&audma0 0x75>, <&audma0 0x76>;
1654 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1655 <&audma0 0x79>, <&audma0 0x7a>;
1660 dmas = <&audma0 0x11>, <&audma0 0x12>,
1661 <&audma0 0x7b>, <&audma0 0x7c>;
1666 dmas = <&audma0 0x13>, <&audma0 0x14>,
1667 <&audma0 0x7d>, <&audma0 0x7e>;
1676 reg = <0 0xec520000 0 0x800>;
1688 reg = <0 0xec700000 0 0x10000>;
1717 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1730 reg = <0 0xee000000 0 0xc00>;
1741 reg = <0 0xee020000 0 0x400>;
1751 reg = <0 0xee080000 0 0x100>;
1763 reg = <0 0xee080100 0 0x100>;
1777 reg = <0 0xee080200 0 0x700>;
1789 reg = <0 0xee100000 0 0x2000>;
1803 reg = <0 0xee120000 0 0x2000>;
1817 reg = <0 0xee160000 0 0x2000>;
1831 reg = <0 0xee200000 0 0x200>,
1832 <0 0x08000000 0 0x04000000>,
1833 <0 0xee208000 0 0x100>;
1840 #size-cells = <0>;
1847 #address-cells = <0>;
1849 reg = <0x0 0xf1010000 0 0x1000>,
1850 <0x0 0xf1020000 0 0x20000>,
1851 <0x0 0xf1040000 0 0x20000>,
1852 <0x0 0xf1060000 0 0x20000>;
1864 reg = <0 0xfe000000 0 0x80000>;
1867 bus-range = <0x00 0xff>;
1869 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1870 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1871 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1872 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1874 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1879 interrupt-map-mask = <0 0 0 0>;
1880 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1885 iommu-map = <0 &ipmmu_hc 0 1>;
1886 iommu-map-mask = <0>;
1892 reg = <0 0xfe960000 0 0x8000>;
1902 reg = <0 0xfe96f000 0 0x200>;
1911 reg = <0 0xfe9a0000 0 0x8000>;
1921 reg = <0 0xfe9af000 0 0x200>;
1930 reg = <0 0xfea20000 0 0x7000>;
1940 reg = <0 0xfea27000 0 0x200>;
1949 reg = <0 0xfea28000 0 0x7000>;
1959 reg = <0 0xfea2f000 0 0x200>;
1969 reg = <0 0xfea40000 0 0x1000>;
1978 reg = <0 0xfea50000 0 0x1000>;
1986 reg = <0 0xfeaa0000 0 0x10000>;
1995 #size-cells = <0>;
1997 port@0 {
1998 reg = <0>;
2003 #size-cells = <0>;
2007 csi40vin4: endpoint@0 {
2008 reg = <0>;
2021 reg = <0 0xfeb00000 0 0x40000>;
2025 clock-names = "du.0", "du.1";
2027 reset-names = "du.0";
2030 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2036 #size-cells = <0>;
2038 port@0 {
2039 reg = <0>;
2060 reg = <0 0xfeb90000 0 0x20>;
2070 #size-cells = <0>;
2072 port@0 {
2073 reg = <0>;
2087 reg = <0 0xfeb90100 0 0x20>;
2095 #size-cells = <0>;
2097 port@0 {
2098 reg = <0>;
2112 reg = <0 0xfff00044 0 4>;
2119 polling-delay = <0>;
2126 cooling-device = <&a53_0 0 2>;