Lines Matching +full:canfd +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77961-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <0>;
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <0>;
40 /* External CAN clock - to be overridden by boards that provide it */
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <0>;
47 cluster0_opp: opp-table-0 {
48 compatible = "operating-points-v2";
49 opp-shared;
51 opp-500000000 {
52 opp-hz = /bits/ 64 <500000000>;
53 opp-microvolt = <830000>;
54 clock-latency-ns = <300000>;
56 opp-1000000000 {
57 opp-hz = /bits/ 64 <1000000000>;
58 opp-microvolt = <830000>;
59 clock-latency-ns = <300000>;
61 opp-1500000000 {
62 opp-hz = /bits/ 64 <1500000000>;
63 opp-microvolt = <830000>;
64 clock-latency-ns = <300000>;
65 opp-suspend;
67 opp-1600000000 {
68 opp-hz = /bits/ 64 <1600000000>;
69 opp-microvolt = <900000>;
70 clock-latency-ns = <300000>;
72 opp-1700000000 {
73 opp-hz = /bits/ 64 <1700000000>;
74 opp-microvolt = <900000>;
75 clock-latency-ns = <300000>;
77 opp-1800000000 {
78 opp-hz = /bits/ 64 <1800000000>;
79 opp-microvolt = <960000>;
80 clock-latency-ns = <300000>;
81 turbo-mode;
85 cluster1_opp: opp-table-1 {
86 compatible = "operating-points-v2";
87 opp-shared;
89 opp-800000000 {
90 opp-hz = /bits/ 64 <800000000>;
91 opp-microvolt = <820000>;
92 clock-latency-ns = <300000>;
94 opp-1000000000 {
95 opp-hz = /bits/ 64 <1000000000>;
96 opp-microvolt = <820000>;
97 clock-latency-ns = <300000>;
99 opp-1200000000 {
100 opp-hz = /bits/ 64 <1200000000>;
101 opp-microvolt = <820000>;
102 clock-latency-ns = <300000>;
104 opp-1300000000 {
105 opp-hz = /bits/ 64 <1300000000>;
106 opp-microvolt = <820000>;
107 clock-latency-ns = <300000>;
108 turbo-mode;
113 #address-cells = <1>;
114 #size-cells = <0>;
116 cpu-map {
143 compatible = "arm,cortex-a57";
146 power-domains = <&sysc R8A77961_PD_CA57_CPU0>;
147 next-level-cache = <&L2_CA57>;
148 enable-method = "psci";
149 cpu-idle-states = <&CPU_SLEEP_0>;
150 dynamic-power-coefficient = <854>;
152 operating-points-v2 = <&cluster0_opp>;
153 capacity-dmips-mhz = <1024>;
154 #cooling-cells = <2>;
157 a57_1: cpu@1 {
158 compatible = "arm,cortex-a57";
161 power-domains = <&sysc R8A77961_PD_CA57_CPU1>;
162 next-level-cache = <&L2_CA57>;
163 enable-method = "psci";
164 cpu-idle-states = <&CPU_SLEEP_0>;
166 operating-points-v2 = <&cluster0_opp>;
167 capacity-dmips-mhz = <1024>;
168 #cooling-cells = <2>;
172 compatible = "arm,cortex-a53";
175 power-domains = <&sysc R8A77961_PD_CA53_CPU0>;
176 next-level-cache = <&L2_CA53>;
177 enable-method = "psci";
178 cpu-idle-states = <&CPU_SLEEP_1>;
179 #cooling-cells = <2>;
180 dynamic-power-coefficient = <277>;
182 operating-points-v2 = <&cluster1_opp>;
183 capacity-dmips-mhz = <535>;
187 compatible = "arm,cortex-a53";
190 power-domains = <&sysc R8A77961_PD_CA53_CPU1>;
191 next-level-cache = <&L2_CA53>;
192 enable-method = "psci";
193 cpu-idle-states = <&CPU_SLEEP_1>;
195 operating-points-v2 = <&cluster1_opp>;
196 capacity-dmips-mhz = <535>;
200 compatible = "arm,cortex-a53";
203 power-domains = <&sysc R8A77961_PD_CA53_CPU2>;
204 next-level-cache = <&L2_CA53>;
205 enable-method = "psci";
206 cpu-idle-states = <&CPU_SLEEP_1>;
208 operating-points-v2 = <&cluster1_opp>;
209 capacity-dmips-mhz = <535>;
213 compatible = "arm,cortex-a53";
216 power-domains = <&sysc R8A77961_PD_CA53_CPU3>;
217 next-level-cache = <&L2_CA53>;
218 enable-method = "psci";
219 cpu-idle-states = <&CPU_SLEEP_1>;
221 operating-points-v2 = <&cluster1_opp>;
222 capacity-dmips-mhz = <535>;
225 L2_CA57: cache-controller-0 {
227 power-domains = <&sysc R8A77961_PD_CA57_SCU>;
228 cache-unified;
229 cache-level = <2>;
232 L2_CA53: cache-controller-1 {
234 power-domains = <&sysc R8A77961_PD_CA53_SCU>;
235 cache-unified;
236 cache-level = <2>;
239 idle-states {
240 entry-method = "psci";
242 CPU_SLEEP_0: cpu-sleep-0 {
243 compatible = "arm,idle-state";
244 arm,psci-suspend-param = <0x0010000>;
245 local-timer-stop;
246 entry-latency-us = <400>;
247 exit-latency-us = <500>;
248 min-residency-us = <4000>;
251 CPU_SLEEP_1: cpu-sleep-1 {
252 compatible = "arm,idle-state";
253 arm,psci-suspend-param = <0x0010000>;
254 local-timer-stop;
255 entry-latency-us = <700>;
256 exit-latency-us = <700>;
257 min-residency-us = <5000>;
263 compatible = "fixed-clock";
264 #clock-cells = <0>;
266 clock-frequency = <0>;
270 compatible = "fixed-clock";
271 #clock-cells = <0>;
273 clock-frequency = <0>;
276 /* External PCIe clock - can be overridden by the board */
278 compatible = "fixed-clock";
279 #clock-cells = <0>;
280 clock-frequency = <0>;
284 compatible = "arm,cortex-a53-pmu";
285 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
289 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
293 compatible = "arm,cortex-a57-pmu";
294 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
296 interrupt-affinity = <&a57_0>, <&a57_1>;
300 compatible = "arm,psci-1.0", "arm,psci-0.2";
304 /* External SCIF clock - to be overridden by boards that provide it */
306 compatible = "fixed-clock";
307 #clock-cells = <0>;
308 clock-frequency = <0>;
312 compatible = "simple-bus";
313 interrupt-parent = <&gic>;
314 #address-cells = <2>;
315 #size-cells = <2>;
319 compatible = "renesas,r8a77961-wdt",
320 "renesas,rcar-gen3-wdt";
324 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
330 compatible = "renesas,gpio-r8a77961",
331 "renesas,rcar-gen3-gpio";
334 #gpio-cells = <2>;
335 gpio-controller;
336 gpio-ranges = <&pfc 0 0 16>;
337 #interrupt-cells = <2>;
338 interrupt-controller;
340 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
345 compatible = "renesas,gpio-r8a77961",
346 "renesas,rcar-gen3-gpio";
349 #gpio-cells = <2>;
350 gpio-controller;
351 gpio-ranges = <&pfc 0 32 29>;
352 #interrupt-cells = <2>;
353 interrupt-controller;
355 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
360 compatible = "renesas,gpio-r8a77961",
361 "renesas,rcar-gen3-gpio";
364 #gpio-cells = <2>;
365 gpio-controller;
366 gpio-ranges = <&pfc 0 64 15>;
367 #interrupt-cells = <2>;
368 interrupt-controller;
370 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
375 compatible = "renesas,gpio-r8a77961",
376 "renesas,rcar-gen3-gpio";
379 #gpio-cells = <2>;
380 gpio-controller;
381 gpio-ranges = <&pfc 0 96 16>;
382 #interrupt-cells = <2>;
383 interrupt-controller;
385 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
390 compatible = "renesas,gpio-r8a77961",
391 "renesas,rcar-gen3-gpio";
394 #gpio-cells = <2>;
395 gpio-controller;
396 gpio-ranges = <&pfc 0 128 18>;
397 #interrupt-cells = <2>;
398 interrupt-controller;
400 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
405 compatible = "renesas,gpio-r8a77961",
406 "renesas,rcar-gen3-gpio";
409 #gpio-cells = <2>;
410 gpio-controller;
411 gpio-ranges = <&pfc 0 160 26>;
412 #interrupt-cells = <2>;
413 interrupt-controller;
415 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
420 compatible = "renesas,gpio-r8a77961",
421 "renesas,rcar-gen3-gpio";
424 #gpio-cells = <2>;
425 gpio-controller;
426 gpio-ranges = <&pfc 0 192 32>;
427 #interrupt-cells = <2>;
428 interrupt-controller;
430 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
435 compatible = "renesas,gpio-r8a77961",
436 "renesas,rcar-gen3-gpio";
439 #gpio-cells = <2>;
440 gpio-controller;
441 gpio-ranges = <&pfc 0 224 4>;
442 #interrupt-cells = <2>;
443 interrupt-controller;
445 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
450 compatible = "renesas,pfc-r8a77961";
455 compatible = "renesas,r8a77961-cmt0",
456 "renesas,rcar-gen3-cmt0";
461 clock-names = "fck";
462 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
468 compatible = "renesas,r8a77961-cmt1",
469 "renesas,rcar-gen3-cmt1";
480 clock-names = "fck";
481 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
487 compatible = "renesas,r8a77961-cmt1",
488 "renesas,rcar-gen3-cmt1";
499 clock-names = "fck";
500 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
506 compatible = "renesas,r8a77961-cmt1",
507 "renesas,rcar-gen3-cmt1";
518 clock-names = "fck";
519 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
524 cpg: clock-controller@e6150000 {
525 compatible = "renesas,r8a77961-cpg-mssr";
528 clock-names = "extal", "extalr";
529 #clock-cells = <2>;
530 #power-domain-cells = <0>;
531 #reset-cells = <1>;
534 rst: reset-controller@e6160000 {
535 compatible = "renesas,r8a77961-rst";
539 sysc: system-controller@e6180000 {
540 compatible = "renesas,r8a77961-sysc";
542 #power-domain-cells = <1>;
546 compatible = "renesas,r8a77961-thermal";
554 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
556 #thermal-sensor-cells = <1>;
559 intc_ex: interrupt-controller@e61c0000 {
560 compatible = "renesas,intc-ex-r8a77961", "renesas,irqc";
561 #interrupt-cells = <2>;
562 interrupt-controller;
565 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
571 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
576 compatible = "renesas,tmu-r8a77961", "renesas,tmu";
582 clock-names = "fck";
583 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
589 compatible = "renesas,tmu-r8a77961", "renesas,tmu";
595 clock-names = "fck";
596 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
602 compatible = "renesas,tmu-r8a77961", "renesas,tmu";
608 clock-names = "fck";
609 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
615 compatible = "renesas,tmu-r8a77961", "renesas,tmu";
621 clock-names = "fck";
622 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
628 compatible = "renesas,tmu-r8a77961", "renesas,tmu";
634 clock-names = "fck";
635 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
641 #address-cells = <1>;
642 #size-cells = <0>;
643 compatible = "renesas,i2c-r8a77961",
644 "renesas,rcar-gen3-i2c";
648 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
652 dma-names = "tx", "rx", "tx", "rx";
653 i2c-scl-internal-delay-ns = <110>;
658 #address-cells = <1>;
659 #size-cells = <0>;
660 compatible = "renesas,i2c-r8a77961",
661 "renesas,rcar-gen3-i2c";
665 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
669 dma-names = "tx", "rx", "tx", "rx";
670 i2c-scl-internal-delay-ns = <6>;
675 #address-cells = <1>;
676 #size-cells = <0>;
677 compatible = "renesas,i2c-r8a77961",
678 "renesas,rcar-gen3-i2c";
682 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
686 dma-names = "tx", "rx", "tx", "rx";
687 i2c-scl-internal-delay-ns = <6>;
692 #address-cells = <1>;
693 #size-cells = <0>;
694 compatible = "renesas,i2c-r8a77961",
695 "renesas,rcar-gen3-i2c";
699 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
702 dma-names = "tx", "rx";
703 i2c-scl-internal-delay-ns = <110>;
708 #address-cells = <1>;
709 #size-cells = <0>;
710 compatible = "renesas,i2c-r8a77961",
711 "renesas,rcar-gen3-i2c";
715 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
718 dma-names = "tx", "rx";
719 i2c-scl-internal-delay-ns = <110>;
724 #address-cells = <1>;
725 #size-cells = <0>;
726 compatible = "renesas,i2c-r8a77961",
727 "renesas,rcar-gen3-i2c";
731 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
734 dma-names = "tx", "rx";
735 i2c-scl-internal-delay-ns = <110>;
740 #address-cells = <1>;
741 #size-cells = <0>;
742 compatible = "renesas,i2c-r8a77961",
743 "renesas,rcar-gen3-i2c";
747 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
750 dma-names = "tx", "rx";
751 i2c-scl-internal-delay-ns = <6>;
756 #address-cells = <1>;
757 #size-cells = <0>;
758 compatible = "renesas,iic-r8a77961",
759 "renesas,rcar-gen3-iic",
760 "renesas,rmobile-iic";
764 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
767 dma-names = "tx", "rx";
772 compatible = "renesas,hscif-r8a77961",
773 "renesas,rcar-gen3-hscif",
780 clock-names = "fck", "brg_int", "scif_clk";
783 dma-names = "tx", "rx", "tx", "rx";
784 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
790 compatible = "renesas,hscif-r8a77961",
791 "renesas,rcar-gen3-hscif",
798 clock-names = "fck", "brg_int", "scif_clk";
801 dma-names = "tx", "rx", "tx", "rx";
802 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
808 compatible = "renesas,hscif-r8a77961",
809 "renesas,rcar-gen3-hscif",
816 clock-names = "fck", "brg_int", "scif_clk";
819 dma-names = "tx", "rx", "tx", "rx";
820 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
826 compatible = "renesas,hscif-r8a77961",
827 "renesas,rcar-gen3-hscif",
834 clock-names = "fck", "brg_int", "scif_clk";
836 dma-names = "tx", "rx";
837 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
843 compatible = "renesas,hscif-r8a77961",
844 "renesas,rcar-gen3-hscif",
851 clock-names = "fck", "brg_int", "scif_clk";
853 dma-names = "tx", "rx";
854 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
860 compatible = "renesas,usbhs-r8a77961",
861 "renesas,rcar-gen3-usbhs";
865 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
866 <&usb_dmac1 0>, <&usb_dmac1 1>;
867 dma-names = "ch0", "ch1", "ch2", "ch3";
870 phy-names = "usb";
871 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
876 usb_dmac0: dma-controller@e65a0000 {
877 compatible = "renesas,r8a77961-usb-dmac",
878 "renesas,usb-dmac";
882 interrupt-names = "ch0", "ch1";
884 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
886 #dma-cells = <1>;
887 dma-channels = <2>;
890 usb_dmac1: dma-controller@e65b0000 {
891 compatible = "renesas,r8a77961-usb-dmac",
892 "renesas,usb-dmac";
896 interrupt-names = "ch0", "ch1";
898 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
900 #dma-cells = <1>;
901 dma-channels = <2>;
904 usb3_phy0: usb-phy@e65ee000 {
905 compatible = "renesas,r8a77961-usb3-phy",
906 "renesas,rcar-gen3-usb3-phy";
910 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
911 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
913 #phy-cells = <0>;
918 compatible = "arm,cryptocell-630p-ree";
923 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
926 dmac0: dma-controller@e6700000 {
927 compatible = "renesas,dmac-r8a77961",
928 "renesas,rcar-dmac";
947 interrupt-names = "error",
953 clock-names = "fck";
954 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
956 #dma-cells = <1>;
957 dma-channels = <16>;
958 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
968 dmac1: dma-controller@e7300000 {
969 compatible = "renesas,dmac-r8a77961",
970 "renesas,rcar-dmac";
989 interrupt-names = "error",
995 clock-names = "fck";
996 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
998 #dma-cells = <1>;
999 dma-channels = <16>;
1000 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1010 dmac2: dma-controller@e7310000 {
1011 compatible = "renesas,dmac-r8a77961",
1012 "renesas,rcar-dmac";
1031 interrupt-names = "error",
1037 clock-names = "fck";
1038 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1040 #dma-cells = <1>;
1041 dma-channels = <16>;
1053 compatible = "renesas,ipmmu-r8a77961";
1055 renesas,ipmmu-main = <&ipmmu_mm 0>;
1056 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1057 #iommu-cells = <1>;
1061 compatible = "renesas,ipmmu-r8a77961";
1063 renesas,ipmmu-main = <&ipmmu_mm 1>;
1064 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1065 #iommu-cells = <1>;
1069 compatible = "renesas,ipmmu-r8a77961";
1071 renesas,ipmmu-main = <&ipmmu_mm 2>;
1072 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1073 #iommu-cells = <1>;
1077 compatible = "renesas,ipmmu-r8a77961";
1079 renesas,ipmmu-main = <&ipmmu_mm 3>;
1080 power-domains = <&sysc R8A77961_PD_A3IR>;
1081 #iommu-cells = <1>;
1085 compatible = "renesas,ipmmu-r8a77961";
1089 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1090 #iommu-cells = <1>;
1094 compatible = "renesas,ipmmu-r8a77961";
1096 renesas,ipmmu-main = <&ipmmu_mm 4>;
1097 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1098 #iommu-cells = <1>;
1102 compatible = "renesas,ipmmu-r8a77961";
1104 renesas,ipmmu-main = <&ipmmu_mm 5>;
1105 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1106 #iommu-cells = <1>;
1110 compatible = "renesas,ipmmu-r8a77961";
1112 renesas,ipmmu-main = <&ipmmu_mm 6>;
1113 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1114 #iommu-cells = <1>;
1118 compatible = "renesas,ipmmu-r8a77961";
1120 renesas,ipmmu-main = <&ipmmu_mm 7>;
1121 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1122 #iommu-cells = <1>;
1126 compatible = "renesas,ipmmu-r8a77961";
1128 renesas,ipmmu-main = <&ipmmu_mm 8>;
1129 power-domains = <&sysc R8A77961_PD_A3VC>;
1130 #iommu-cells = <1>;
1134 compatible = "renesas,ipmmu-r8a77961";
1136 renesas,ipmmu-main = <&ipmmu_mm 9>;
1137 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1138 #iommu-cells = <1>;
1142 compatible = "renesas,etheravb-r8a77961",
1143 "renesas,etheravb-rcar-gen3";
1170 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1178 clock-names = "fck";
1179 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1181 phy-mode = "rgmii";
1182 rx-internal-delay-ps = <0>;
1183 tx-internal-delay-ps = <0>;
1185 #address-cells = <1>;
1186 #size-cells = <0>;
1191 compatible = "renesas,can-r8a77961",
1192 "renesas,rcar-gen3-can";
1198 clock-names = "clkp1", "clkp2", "can_clk";
1199 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1200 assigned-clock-rates = <40000000>;
1201 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1207 compatible = "renesas,can-r8a77961",
1208 "renesas,rcar-gen3-can";
1214 clock-names = "clkp1", "clkp2", "can_clk";
1215 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1216 assigned-clock-rates = <40000000>;
1217 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1222 canfd: can@e66c0000 {
1223 compatible = "renesas,r8a77961-canfd",
1224 "renesas,rcar-gen3-canfd";
1228 interrupt-names = "ch_int", "g_int";
1232 clock-names = "fck", "canfd", "can_clk";
1233 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1234 assigned-clock-rates = <40000000>;
1235 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1249 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1251 #pwm-cells = <2>;
1254 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1259 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1261 #pwm-cells = <2>;
1264 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1269 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1271 #pwm-cells = <2>;
1274 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1279 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1281 #pwm-cells = <2>;
1284 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1289 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1291 #pwm-cells = <2>;
1294 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1299 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1301 #pwm-cells = <2>;
1304 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1309 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1311 #pwm-cells = <2>;
1314 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1319 compatible = "renesas,scif-r8a77961",
1320 "renesas,rcar-gen3-scif", "renesas,scif";
1326 clock-names = "fck", "brg_int", "scif_clk";
1329 dma-names = "tx", "rx", "tx", "rx";
1330 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1336 compatible = "renesas,scif-r8a77961",
1337 "renesas,rcar-gen3-scif", "renesas,scif";
1343 clock-names = "fck", "brg_int", "scif_clk";
1346 dma-names = "tx", "rx", "tx", "rx";
1347 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1353 compatible = "renesas,scif-r8a77961",
1354 "renesas,rcar-gen3-scif", "renesas,scif";
1360 clock-names = "fck", "brg_int", "scif_clk";
1363 dma-names = "tx", "rx", "tx", "rx";
1364 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1370 compatible = "renesas,scif-r8a77961",
1371 "renesas,rcar-gen3-scif", "renesas,scif";
1377 clock-names = "fck", "brg_int", "scif_clk";
1379 dma-names = "tx", "rx";
1380 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1386 compatible = "renesas,scif-r8a77961",
1387 "renesas,rcar-gen3-scif", "renesas,scif";
1393 clock-names = "fck", "brg_int", "scif_clk";
1395 dma-names = "tx", "rx";
1396 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1402 compatible = "renesas,scif-r8a77961",
1403 "renesas,rcar-gen3-scif", "renesas,scif";
1409 clock-names = "fck", "brg_int", "scif_clk";
1412 dma-names = "tx", "rx", "tx", "rx";
1413 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1419 compatible = "renesas,tpu-r8a77961", "renesas,tpu";
1423 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1425 #pwm-cells = <3>;
1430 compatible = "renesas,msiof-r8a77961",
1431 "renesas,rcar-gen3-msiof";
1437 dma-names = "tx", "rx", "tx", "rx";
1438 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1440 #address-cells = <1>;
1441 #size-cells = <0>;
1446 compatible = "renesas,msiof-r8a77961",
1447 "renesas,rcar-gen3-msiof";
1453 dma-names = "tx", "rx", "tx", "rx";
1454 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1456 #address-cells = <1>;
1457 #size-cells = <0>;
1462 compatible = "renesas,msiof-r8a77961",
1463 "renesas,rcar-gen3-msiof";
1468 dma-names = "tx", "rx";
1469 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1471 #address-cells = <1>;
1472 #size-cells = <0>;
1477 compatible = "renesas,msiof-r8a77961",
1478 "renesas,rcar-gen3-msiof";
1483 dma-names = "tx", "rx";
1484 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1486 #address-cells = <1>;
1487 #size-cells = <0>;
1492 compatible = "renesas,vin-r8a77961";
1496 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1502 #address-cells = <1>;
1503 #size-cells = <0>;
1505 port@1 {
1506 #address-cells = <1>;
1507 #size-cells = <0>;
1509 reg = <1>;
1513 remote-endpoint = <&csi20vin0>;
1517 remote-endpoint = <&csi40vin0>;
1524 compatible = "renesas,vin-r8a77961";
1528 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1530 renesas,id = <1>;
1534 #address-cells = <1>;
1535 #size-cells = <0>;
1537 port@1 {
1538 #address-cells = <1>;
1539 #size-cells = <0>;
1541 reg = <1>;
1545 remote-endpoint = <&csi20vin1>;
1549 remote-endpoint = <&csi40vin1>;
1556 compatible = "renesas,vin-r8a77961";
1560 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1566 #address-cells = <1>;
1567 #size-cells = <0>;
1569 port@1 {
1570 #address-cells = <1>;
1571 #size-cells = <0>;
1573 reg = <1>;
1577 remote-endpoint = <&csi20vin2>;
1581 remote-endpoint = <&csi40vin2>;
1588 compatible = "renesas,vin-r8a77961";
1592 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1598 #address-cells = <1>;
1599 #size-cells = <0>;
1601 port@1 {
1602 #address-cells = <1>;
1603 #size-cells = <0>;
1605 reg = <1>;
1609 remote-endpoint = <&csi20vin3>;
1613 remote-endpoint = <&csi40vin3>;
1620 compatible = "renesas,vin-r8a77961";
1624 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1630 #address-cells = <1>;
1631 #size-cells = <0>;
1633 port@1 {
1634 #address-cells = <1>;
1635 #size-cells = <0>;
1637 reg = <1>;
1641 remote-endpoint = <&csi20vin4>;
1645 remote-endpoint = <&csi40vin4>;
1652 compatible = "renesas,vin-r8a77961";
1656 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1662 #address-cells = <1>;
1663 #size-cells = <0>;
1665 port@1 {
1666 #address-cells = <1>;
1667 #size-cells = <0>;
1669 reg = <1>;
1673 remote-endpoint = <&csi20vin5>;
1677 remote-endpoint = <&csi40vin5>;
1684 compatible = "renesas,vin-r8a77961";
1688 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1694 #address-cells = <1>;
1695 #size-cells = <0>;
1697 port@1 {
1698 #address-cells = <1>;
1699 #size-cells = <0>;
1701 reg = <1>;
1705 remote-endpoint = <&csi20vin6>;
1709 remote-endpoint = <&csi40vin6>;
1716 compatible = "renesas,vin-r8a77961";
1720 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1726 #address-cells = <1>;
1727 #size-cells = <0>;
1729 port@1 {
1730 #address-cells = <1>;
1731 #size-cells = <0>;
1733 reg = <1>;
1737 remote-endpoint = <&csi20vin7>;
1741 remote-endpoint = <&csi40vin7>;
1749 * #sound-dai-cells is required if simple-card
1751 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1752 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1755 * #clock-cells is required for audio_clkout0/1/2/3
1757 * clkout : #clock-cells = <0>; <&rcar_sound>;
1758 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1760 compatible = "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3";
1766 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1785 clock-names = "ssi-all",
1788 "ssi.1", "ssi.0",
1791 "src.1", "src.0",
1792 "mix.1", "mix.0",
1793 "ctu.1", "ctu.0",
1794 "dvc.0", "dvc.1",
1796 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1803 reset-names = "ssi-all",
1806 "ssi.1", "ssi.0";
1810 ctu00: ctu-0 { };
1811 ctu01: ctu-1 { };
1812 ctu02: ctu-2 { };
1813 ctu03: ctu-3 { };
1814 ctu10: ctu-4 { };
1815 ctu11: ctu-5 { };
1816 ctu12: ctu-6 { };
1817 ctu13: ctu-7 { };
1821 dvc0: dvc-0 {
1823 dma-names = "tx";
1825 dvc1: dvc-1 {
1827 dma-names = "tx";
1832 mix0: mix-0 { };
1833 mix1: mix-1 { };
1837 src0: src-0 {
1840 dma-names = "rx", "tx";
1842 src1: src-1 {
1845 dma-names = "rx", "tx";
1847 src2: src-2 {
1850 dma-names = "rx", "tx";
1852 src3: src-3 {
1855 dma-names = "rx", "tx";
1857 src4: src-4 {
1860 dma-names = "rx", "tx";
1862 src5: src-5 {
1865 dma-names = "rx", "tx";
1867 src6: src-6 {
1870 dma-names = "rx", "tx";
1872 src7: src-7 {
1875 dma-names = "rx", "tx";
1877 src8: src-8 {
1880 dma-names = "rx", "tx";
1882 src9: src-9 {
1885 dma-names = "rx", "tx";
1890 ssi0: ssi-0 {
1893 dma-names = "rx", "tx";
1895 ssi1: ssi-1 {
1898 dma-names = "rx", "tx";
1900 ssi2: ssi-2 {
1903 dma-names = "rx", "tx";
1905 ssi3: ssi-3 {
1908 dma-names = "rx", "tx";
1910 ssi4: ssi-4 {
1913 dma-names = "rx", "tx";
1915 ssi5: ssi-5 {
1918 dma-names = "rx", "tx";
1920 ssi6: ssi-6 {
1923 dma-names = "rx", "tx";
1925 ssi7: ssi-7 {
1928 dma-names = "rx", "tx";
1930 ssi8: ssi-8 {
1933 dma-names = "rx", "tx";
1935 ssi9: ssi-9 {
1938 dma-names = "rx", "tx";
1943 ssiu00: ssiu-0 {
1945 dma-names = "rx", "tx";
1947 ssiu01: ssiu-1 {
1949 dma-names = "rx", "tx";
1951 ssiu02: ssiu-2 {
1953 dma-names = "rx", "tx";
1955 ssiu03: ssiu-3 {
1957 dma-names = "rx", "tx";
1959 ssiu04: ssiu-4 {
1961 dma-names = "rx", "tx";
1963 ssiu05: ssiu-5 {
1965 dma-names = "rx", "tx";
1967 ssiu06: ssiu-6 {
1969 dma-names = "rx", "tx";
1971 ssiu07: ssiu-7 {
1973 dma-names = "rx", "tx";
1975 ssiu10: ssiu-8 {
1977 dma-names = "rx", "tx";
1979 ssiu11: ssiu-9 {
1981 dma-names = "rx", "tx";
1983 ssiu12: ssiu-10 {
1985 dma-names = "rx", "tx";
1987 ssiu13: ssiu-11 {
1989 dma-names = "rx", "tx";
1991 ssiu14: ssiu-12 {
1993 dma-names = "rx", "tx";
1995 ssiu15: ssiu-13 {
1997 dma-names = "rx", "tx";
1999 ssiu16: ssiu-14 {
2001 dma-names = "rx", "tx";
2003 ssiu17: ssiu-15 {
2005 dma-names = "rx", "tx";
2007 ssiu20: ssiu-16 {
2009 dma-names = "rx", "tx";
2011 ssiu21: ssiu-17 {
2013 dma-names = "rx", "tx";
2015 ssiu22: ssiu-18 {
2017 dma-names = "rx", "tx";
2019 ssiu23: ssiu-19 {
2021 dma-names = "rx", "tx";
2023 ssiu24: ssiu-20 {
2025 dma-names = "rx", "tx";
2027 ssiu25: ssiu-21 {
2029 dma-names = "rx", "tx";
2031 ssiu26: ssiu-22 {
2033 dma-names = "rx", "tx";
2035 ssiu27: ssiu-23 {
2037 dma-names = "rx", "tx";
2039 ssiu30: ssiu-24 {
2041 dma-names = "rx", "tx";
2043 ssiu31: ssiu-25 {
2045 dma-names = "rx", "tx";
2047 ssiu32: ssiu-26 {
2049 dma-names = "rx", "tx";
2051 ssiu33: ssiu-27 {
2053 dma-names = "rx", "tx";
2055 ssiu34: ssiu-28 {
2057 dma-names = "rx", "tx";
2059 ssiu35: ssiu-29 {
2061 dma-names = "rx", "tx";
2063 ssiu36: ssiu-30 {
2065 dma-names = "rx", "tx";
2067 ssiu37: ssiu-31 {
2069 dma-names = "rx", "tx";
2071 ssiu40: ssiu-32 {
2073 dma-names = "rx", "tx";
2075 ssiu41: ssiu-33 {
2077 dma-names = "rx", "tx";
2079 ssiu42: ssiu-34 {
2081 dma-names = "rx", "tx";
2083 ssiu43: ssiu-35 {
2085 dma-names = "rx", "tx";
2087 ssiu44: ssiu-36 {
2089 dma-names = "rx", "tx";
2091 ssiu45: ssiu-37 {
2093 dma-names = "rx", "tx";
2095 ssiu46: ssiu-38 {
2097 dma-names = "rx", "tx";
2099 ssiu47: ssiu-39 {
2101 dma-names = "rx", "tx";
2103 ssiu50: ssiu-40 {
2105 dma-names = "rx", "tx";
2107 ssiu60: ssiu-41 {
2109 dma-names = "rx", "tx";
2111 ssiu70: ssiu-42 {
2113 dma-names = "rx", "tx";
2115 ssiu80: ssiu-43 {
2117 dma-names = "rx", "tx";
2119 ssiu90: ssiu-44 {
2121 dma-names = "rx", "tx";
2123 ssiu91: ssiu-45 {
2125 dma-names = "rx", "tx";
2127 ssiu92: ssiu-46 {
2129 dma-names = "rx", "tx";
2131 ssiu93: ssiu-47 {
2133 dma-names = "rx", "tx";
2135 ssiu94: ssiu-48 {
2137 dma-names = "rx", "tx";
2139 ssiu95: ssiu-49 {
2141 dma-names = "rx", "tx";
2143 ssiu96: ssiu-50 {
2145 dma-names = "rx", "tx";
2147 ssiu97: ssiu-51 {
2149 dma-names = "rx", "tx";
2155 compatible = "renesas,r8a77961-mlp",
2156 "renesas,rcar-gen3-mlp";
2161 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2166 audma0: dma-controller@ec700000 {
2167 compatible = "renesas,dmac-r8a77961",
2168 "renesas,rcar-dmac";
2187 interrupt-names = "error",
2193 clock-names = "fck";
2194 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2196 #dma-cells = <1>;
2197 dma-channels = <16>;
2198 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2208 audma1: dma-controller@ec720000 {
2209 compatible = "renesas,dmac-r8a77961",
2210 "renesas,rcar-dmac";
2229 interrupt-names = "error",
2235 clock-names = "fck";
2236 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2238 #dma-cells = <1>;
2239 dma-channels = <16>;
2251 compatible = "renesas,xhci-r8a77961",
2252 "renesas,rcar-gen3-xhci";
2256 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2262 compatible = "renesas,r8a77961-usb3-peri",
2263 "renesas,rcar-gen3-usb3-peri";
2267 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2273 compatible = "generic-ohci";
2277 phys = <&usb2_phy0 1>;
2278 phy-names = "usb";
2279 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2285 compatible = "generic-ohci";
2289 phys = <&usb2_phy1 1>;
2290 phy-names = "usb";
2291 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2297 compatible = "generic-ehci";
2302 phy-names = "usb";
2304 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2310 compatible = "generic-ehci";
2315 phy-names = "usb";
2317 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2322 usb2_phy0: usb-phy@ee080200 {
2323 compatible = "renesas,usb2-phy-r8a77961",
2324 "renesas,rcar-gen3-usb2-phy";
2328 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2330 #phy-cells = <1>;
2334 usb2_phy1: usb-phy@ee0a0200 {
2335 compatible = "renesas,usb2-phy-r8a77961",
2336 "renesas,rcar-gen3-usb2-phy";
2339 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2341 #phy-cells = <1>;
2346 compatible = "renesas,sdhi-r8a77961",
2347 "renesas,rcar-gen3-sdhi";
2351 clock-names = "core", "clkh";
2352 max-frequency = <200000000>;
2353 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2360 compatible = "renesas,sdhi-r8a77961",
2361 "renesas,rcar-gen3-sdhi";
2365 clock-names = "core", "clkh";
2366 max-frequency = <200000000>;
2367 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2374 compatible = "renesas,sdhi-r8a77961",
2375 "renesas,rcar-gen3-sdhi";
2379 clock-names = "core", "clkh";
2380 max-frequency = <200000000>;
2381 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2388 compatible = "renesas,sdhi-r8a77961",
2389 "renesas,rcar-gen3-sdhi";
2393 clock-names = "core", "clkh";
2394 max-frequency = <200000000>;
2395 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2402 compatible = "renesas,r8a77961-rpc-if",
2403 "renesas,rcar-gen3-rpc-if";
2407 reg-names = "regs", "dirmap", "wbuf";
2410 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2412 #address-cells = <1>;
2413 #size-cells = <0>;
2417 gic: interrupt-controller@f1010000 {
2418 compatible = "arm,gic-400";
2419 #interrupt-cells = <3>;
2420 #address-cells = <0>;
2421 interrupt-controller;
2429 clock-names = "clk";
2430 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2435 compatible = "renesas,pcie-r8a77961",
2436 "renesas,pcie-rcar-gen3";
2438 #address-cells = <3>;
2439 #size-cells = <2>;
2440 bus-range = <0x00 0xff>;
2447 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2451 #interrupt-cells = <1>;
2452 interrupt-map-mask = <0 0 0 0>;
2453 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2455 clock-names = "pcie", "pcie_bus";
2456 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2458 iommu-map = <0 &ipmmu_hc 0 1>;
2459 iommu-map-mask = <0>;
2464 compatible = "renesas,pcie-r8a77961",
2465 "renesas,pcie-rcar-gen3";
2467 #address-cells = <3>;
2468 #size-cells = <2>;
2469 bus-range = <0x00 0xff>;
2476 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2480 #interrupt-cells = <1>;
2481 interrupt-map-mask = <0 0 0 0>;
2482 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2484 clock-names = "pcie", "pcie_bus";
2485 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2487 iommu-map = <0 &ipmmu_hc 1 1>;
2488 iommu-map-mask = <0>;
2496 power-domains = <&sysc R8A77961_PD_A3VC>;
2504 power-domains = <&sysc R8A77961_PD_A3VC>;
2512 power-domains = <&sysc R8A77961_PD_A3VC>;
2521 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2530 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2539 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2549 power-domains = <&sysc R8A77961_PD_A3VC>;
2560 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2571 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2582 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2593 power-domains = <&sysc R8A77961_PD_A3VC>;
2600 compatible = "renesas,r8a77961-csi2";
2604 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2609 #address-cells = <1>;
2610 #size-cells = <0>;
2616 port@1 {
2617 #address-cells = <1>;
2618 #size-cells = <0>;
2620 reg = <1>;
2624 remote-endpoint = <&vin0csi20>;
2626 csi20vin1: endpoint@1 {
2627 reg = <1>;
2628 remote-endpoint = <&vin1csi20>;
2632 remote-endpoint = <&vin2csi20>;
2636 remote-endpoint = <&vin3csi20>;
2640 remote-endpoint = <&vin4csi20>;
2644 remote-endpoint = <&vin5csi20>;
2648 remote-endpoint = <&vin6csi20>;
2652 remote-endpoint = <&vin7csi20>;
2659 compatible = "renesas,r8a77961-csi2";
2663 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2668 #address-cells = <1>;
2669 #size-cells = <0>;
2675 port@1 {
2676 #address-cells = <1>;
2677 #size-cells = <0>;
2679 reg = <1>;
2683 remote-endpoint = <&vin0csi40>;
2685 csi40vin1: endpoint@1 {
2686 reg = <1>;
2687 remote-endpoint = <&vin1csi40>;
2691 remote-endpoint = <&vin2csi40>;
2695 remote-endpoint = <&vin3csi40>;
2699 remote-endpoint = <&vin4csi40>;
2703 remote-endpoint = <&vin5csi40>;
2707 remote-endpoint = <&vin6csi40>;
2711 remote-endpoint = <&vin7csi40>;
2719 compatible = "renesas,r8a77961-hdmi", "renesas,rcar-gen3-hdmi";
2723 clock-names = "iahb", "isfr";
2724 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2729 #address-cells = <1>;
2730 #size-cells = <0>;
2734 remote-endpoint = <&du_out_hdmi0>;
2737 port@1 {
2738 reg = <1>;
2748 compatible = "renesas,du-r8a77961";
2755 clock-names = "du.0", "du.1", "du.2";
2757 reset-names = "du.0", "du.2";
2763 #address-cells = <1>;
2764 #size-cells = <0>;
2769 port@1 {
2770 reg = <1>;
2772 remote-endpoint = <&dw_hdmi0_in>;
2778 remote-endpoint = <&lvds0_in>;
2785 compatible = "renesas,r8a77961-lvds";
2788 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2793 #address-cells = <1>;
2794 #size-cells = <0>;
2799 remote-endpoint = <&du_out_lvds0>;
2802 port@1 {
2803 reg = <1>;
2814 thermal-zones {
2815 sensor1_thermal: sensor1-thermal {
2816 polling-delay-passive = <250>;
2817 polling-delay = <1000>;
2818 thermal-sensors = <&tsc 0>;
2819 sustainable-power = <3874>;
2822 sensor1_crit: sensor1-crit {
2830 sensor2_thermal: sensor2-thermal {
2831 polling-delay-passive = <250>;
2832 polling-delay = <1000>;
2833 thermal-sensors = <&tsc 1>;
2834 sustainable-power = <3874>;
2837 sensor2_crit: sensor2-crit {
2845 sensor3_thermal: sensor3-thermal {
2846 polling-delay-passive = <250>;
2847 polling-delay = <1000>;
2848 thermal-sensors = <&tsc 2>;
2849 sustainable-power = <3874>;
2851 cooling-maps {
2854 cooling-device = <&a57_0 2 4>;
2859 cooling-device = <&a53_0 0 2>;
2864 target: trip-point1 {
2870 sensor3_crit: sensor3-crit {
2880 compatible = "arm,armv8-timer";
2881 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2887 /* External USB clocks - can be overridden by the board */
2889 compatible = "fixed-clock";
2890 #clock-cells = <0>;
2891 clock-frequency = <0>;
2895 compatible = "fixed-clock";
2896 #clock-cells = <0>;
2897 clock-frequency = <0>;