Lines Matching +full:0 +full:xec5a0000
18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
67 #size-cells = <0>;
69 a53_0: cpu@0 {
71 reg = <0>;
93 L2_CA53: cache-controller-0 {
103 #clock-cells = <0>;
105 clock-frequency = <0>;
111 #clock-cells = <0>;
112 clock-frequency = <0>;
130 #clock-cells = <0>;
131 clock-frequency = <0>;
144 reg = <0 0xe6020000 0 0x0c>;
155 reg = <0 0xe6050000 0 0x50>;
159 gpio-ranges = <&pfc 0 0 18>;
170 reg = <0 0xe6051000 0 0x50>;
174 gpio-ranges = <&pfc 0 32 23>;
185 reg = <0 0xe6052000 0 0x50>;
189 gpio-ranges = <&pfc 0 64 26>;
200 reg = <0 0xe6053000 0 0x50>;
204 gpio-ranges = <&pfc 0 96 16>;
215 reg = <0 0xe6054000 0 0x50>;
219 gpio-ranges = <&pfc 0 128 11>;
230 reg = <0 0xe6055000 0 0x50>;
234 gpio-ranges = <&pfc 0 160 20>;
245 reg = <0 0xe6055400 0 0x50>;
249 gpio-ranges = <&pfc 0 192 18>;
259 reg = <0 0xe6060000 0 0x508>;
265 reg = <0 0xe60f0000 0 0x1004>;
278 reg = <0 0xe6130000 0 0x1004>;
297 reg = <0 0xe6140000 0 0x1004>;
316 reg = <0 0xe6148000 0 0x1004>;
334 reg = <0 0xe6150000 0 0x1000>;
338 #power-domain-cells = <0>;
344 reg = <0 0xe6160000 0 0x0200>;
349 reg = <0 0xe6180000 0 0x0400>;
355 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
362 #thermal-sensor-cells = <0>;
369 reg = <0 0xe61c0000 0 0x200>;
370 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
383 reg = <0 0xe61e0000 0 0x30>;
396 reg = <0 0xe6fc0000 0 0x30>;
409 reg = <0 0xe6fd0000 0 0x30>;
422 reg = <0 0xe6fe0000 0 0x30>;
435 reg = <0 0xffc00000 0 0x30>;
448 #size-cells = <0>;
451 reg = <0 0xe6500000 0 0x40>;
456 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
457 <&dmac2 0x91>, <&dmac2 0x90>;
465 #size-cells = <0>;
468 reg = <0 0xe6508000 0 0x40>;
473 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
474 <&dmac2 0x93>, <&dmac2 0x92>;
482 #size-cells = <0>;
485 reg = <0 0xe6510000 0 0x40>;
490 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
491 <&dmac2 0x95>, <&dmac2 0x94>;
499 #size-cells = <0>;
502 reg = <0 0xe66d0000 0 0x40>;
507 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
515 #size-cells = <0>;
518 reg = <0 0xe66d8000 0 0x40>;
523 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
531 #size-cells = <0>;
534 reg = <0 0xe66e0000 0 0x40>;
539 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
547 #size-cells = <0>;
550 reg = <0 0xe66e8000 0 0x40>;
555 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
563 #size-cells = <0>;
566 reg = <0 0xe6690000 0 0x40>;
577 #size-cells = <0>;
581 reg = <0 0xe60b0000 0 0x425>;
586 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
595 reg = <0 0xe6540000 0 0x60>;
601 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
602 <&dmac2 0x31>, <&dmac2 0x30>;
613 reg = <0 0xe6550000 0 0x60>;
619 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
620 <&dmac2 0x33>, <&dmac2 0x32>;
631 reg = <0 0xe6560000 0 0x60>;
637 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
638 <&dmac2 0x35>, <&dmac2 0x34>;
649 reg = <0 0xe66a0000 0 0x60>;
655 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
666 reg = <0 0xe66b0000 0 0x60>;
672 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
682 reg = <0 0xe6590000 0 0x200>;
685 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
686 <&usb_dmac1 0>, <&usb_dmac1 1>;
699 reg = <0 0xe65a0000 0 0x100>;
713 reg = <0 0xe65b0000 0 0x100>;
727 reg = <0 0xe6700000 0 0x10000>;
756 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
769 reg = <0 0xe7300000 0 0x10000>;
798 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
811 reg = <0 0xe7310000 0 0x10000>;
852 reg = <0 0xe6740000 0 0x1000>;
853 renesas,ipmmu-main = <&ipmmu_mm 0>;
860 reg = <0 0xe7740000 0 0x1000>;
868 reg = <0 0xe6570000 0 0x1000>;
876 reg = <0 0xe67b0000 0 0x1000>;
885 reg = <0 0xec670000 0 0x1000>;
893 reg = <0 0xfd800000 0 0x1000>;
901 reg = <0 0xfe6b0000 0 0x1000>;
909 reg = <0 0xfebd0000 0 0x1000>;
917 reg = <0 0xfe990000 0 0x1000>;
926 reg = <0 0xe6800000 0 0x800>;
964 rx-internal-delay-ps = <0>;
967 #size-cells = <0>;
974 reg = <0 0xe6c30000 0 0x1000>;
990 reg = <0 0xe6c38000 0 0x1000>;
1006 reg = <0 0xe66c0000 0 0x8000>;
1031 reg = <0 0xe6e30000 0 0x8>;
1041 reg = <0 0xe6e31000 0 0x8>;
1051 reg = <0 0xe6e32000 0 0x8>;
1061 reg = <0 0xe6e33000 0 0x8>;
1071 reg = <0 0xe6e34000 0 0x8>;
1081 reg = <0 0xe6e35000 0 0x8>;
1091 reg = <0 0xe6e36000 0 0x8>;
1102 reg = <0 0xe6e60000 0 64>;
1108 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1109 <&dmac2 0x51>, <&dmac2 0x50>;
1119 reg = <0 0xe6e68000 0 64>;
1125 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1126 <&dmac2 0x53>, <&dmac2 0x52>;
1136 reg = <0 0xe6e88000 0 64>;
1142 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1143 <&dmac2 0x13>, <&dmac2 0x12>;
1153 reg = <0 0xe6c50000 0 64>;
1159 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1169 reg = <0 0xe6c40000 0 64>;
1175 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1185 reg = <0 0xe6f30000 0 64>;
1191 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1201 reg = <0 0xe6e90000 0 0x0064>;
1204 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1205 <&dmac2 0x41>, <&dmac2 0x40>;
1210 #size-cells = <0>;
1217 reg = <0 0xe6ea0000 0 0x0064>;
1220 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1225 #size-cells = <0>;
1232 reg = <0 0xe6c00000 0 0x0064>;
1235 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1240 #size-cells = <0>;
1247 reg = <0 0xe6c10000 0 0x0064>;
1250 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1255 #size-cells = <0>;
1261 reg = <0 0xe6ef4000 0 0x1000>;
1271 #size-cells = <0>;
1275 #size-cells = <0>;
1289 reg = <0 0xe6ef5000 0 0x1000>;
1299 #size-cells = <0>;
1303 #size-cells = <0>;
1319 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1325 * clkout : #clock-cells = <0>; <&rcar_sound>;
1330 reg = <0 0xec500000 0 0x1000>, /* SCU */
1331 <0 0xec5a0000 0 0x100>, /* ADG */
1332 <0 0xec540000 0 0x1000>, /* SSIU */
1333 <0 0xec541000 0 0x280>, /* SSI */
1334 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1357 "ssi.1", "ssi.0",
1360 "src.1", "src.0",
1361 "mix.1", "mix.0",
1362 "ctu.1", "ctu.0",
1363 "dvc.0", "dvc.1",
1375 "ssi.1", "ssi.0";
1379 ctu00: ctu-0 { };
1390 dvc0: dvc-0 {
1391 dmas = <&audma0 0xbc>;
1395 dmas = <&audma0 0xbe>;
1401 mix0: mix-0 { };
1406 src0: src-0 {
1408 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1413 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1418 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1423 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1428 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1433 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1438 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1443 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1448 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1453 dmas = <&audma0 0x97>, <&audma0 0xba>;
1459 ssi0: ssi-0 {
1461 dmas = <&audma0 0x01>, <&audma0 0x02>,
1462 <&audma0 0x15>, <&audma0 0x16>;
1467 dmas = <&audma0 0x03>, <&audma0 0x04>,
1468 <&audma0 0x49>, <&audma0 0x4a>;
1473 dmas = <&audma0 0x05>, <&audma0 0x06>,
1474 <&audma0 0x63>, <&audma0 0x64>;
1479 dmas = <&audma0 0x07>, <&audma0 0x08>,
1480 <&audma0 0x6f>, <&audma0 0x70>;
1485 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1486 <&audma0 0x71>, <&audma0 0x72>;
1491 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1492 <&audma0 0x73>, <&audma0 0x74>;
1497 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1498 <&audma0 0x75>, <&audma0 0x76>;
1503 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1504 <&audma0 0x79>, <&audma0 0x7a>;
1509 dmas = <&audma0 0x11>, <&audma0 0x12>,
1510 <&audma0 0x7b>, <&audma0 0x7c>;
1515 dmas = <&audma0 0x13>, <&audma0 0x14>,
1516 <&audma0 0x7d>, <&audma0 0x7e>;
1525 reg = <0 0xec700000 0 0x10000>;
1554 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1567 reg = <0 0xee000000 0 0xc00>;
1578 reg = <0 0xee020000 0 0x400>;
1588 reg = <0 0xee080000 0 0x100>;
1600 reg = <0 0xee080100 0 0x100>;
1614 reg = <0 0xee080200 0 0x700>;
1626 reg = <0 0xee100000 0 0x2000>;
1639 reg = <0 0xee120000 0 0x2000>;
1652 reg = <0 0xee160000 0 0x2000>;
1665 reg = <0 0xee200000 0 0x200>,
1666 <0 0x08000000 0 0x4000000>,
1667 <0 0xee208000 0 0x100>;
1674 #size-cells = <0>;
1681 #address-cells = <0>;
1683 reg = <0x0 0xf1010000 0 0x1000>,
1684 <0x0 0xf1020000 0 0x20000>,
1685 <0x0 0xf1040000 0 0x20000>,
1686 <0x0 0xf1060000 0 0x20000>;
1698 reg = <0 0xfe000000 0 0x80000>;
1701 bus-range = <0x00 0xff>;
1703 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1704 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1705 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1706 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1708 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1713 interrupt-map-mask = <0 0 0 0>;
1714 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1719 iommu-map = <0 &ipmmu_hc 0 1>;
1720 iommu-map-mask = <0>;
1727 reg = <0x0 0xfe000000 0 0x80000>,
1728 <0x0 0xfe100000 0 0x100000>,
1729 <0x0 0xfe200000 0 0x200000>,
1730 <0x0 0x30000000 0 0x8000000>,
1731 <0x0 0x38000000 0 0x8000000>;
1745 reg = <0 0xfe960000 0 0x8000>;
1755 reg = <0 0xfea20000 0 0x7000>;
1765 reg = <0 0xfea28000 0 0x7000>;
1775 reg = <0 0xfe9a0000 0 0x8000>;
1785 reg = <0 0xfe96f000 0 0x200>;
1794 reg = <0 0xfea27000 0 0x200>;
1803 reg = <0 0xfea2f000 0 0x200>;
1812 reg = <0 0xfe9af000 0 0x200>;
1821 reg = <0 0xfeaa0000 0 0x10000>;
1830 #size-cells = <0>;
1832 port@0 {
1833 reg = <0>;
1838 #size-cells = <0>;
1842 csi40vin4: endpoint@0 {
1843 reg = <0>;
1856 reg = <0 0xfeb00000 0 0x40000>;
1860 clock-names = "du.0", "du.1";
1862 reset-names = "du.0";
1863 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1869 #size-cells = <0>;
1871 port@0 {
1872 reg = <0>;
1893 reg = <0 0xfeb90000 0 0x20>;
1903 #size-cells = <0>;
1905 port@0 {
1906 reg = <0>;
1920 reg = <0 0xfeb90100 0 0x20>;
1928 #size-cells = <0>;
1930 port@0 {
1931 reg = <0>;
1945 reg = <0 0xfff00044 0 4>;
1952 polling-delay = <0>;
1959 cooling-device = <&a53_0 0 2>;
1991 #clock-cells = <0>;
1992 clock-frequency = <0>;
1997 #clock-cells = <0>;
1998 clock-frequency = <0>;