Lines Matching +full:1 +full:c0b000
208 clocks = <&cpufreq_hw 1>;
215 qcom,freq-domain = <&cpufreq_hw 1>;
233 clocks = <&cpufreq_hw 1>;
240 qcom,freq-domain = <&cpufreq_hw 1>;
258 clocks = <&cpufreq_hw 1>;
265 qcom,freq-domain = <&cpufreq_hw 1>;
353 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
675 #reset-cells = <1>;
884 #qcom,smem-state-cells = <1>;
908 #qcom,smem-state-cells = <1>;
932 #qcom,smem-state-cells = <1>;
952 #clock-cells = <1>;
953 #reset-cells = <1>;
954 #power-domain-cells = <1>;
975 #address-cells = <1>;
976 #size-cells = <1>;
1032 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
1041 #address-cells = <1>;
1053 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
1063 #address-cells = <1>;
1076 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
1077 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
1086 #address-cells = <1>;
1097 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
1098 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
1108 #address-cells = <1>;
1122 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
1131 #address-cells = <1>;
1143 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
1153 #address-cells = <1>;
1167 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
1176 #address-cells = <1>;
1188 <&gpi_dma2 1 3 QCOM_GPI_SPI>;
1198 #address-cells = <1>;
1229 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
1238 #address-cells = <1>;
1250 <&gpi_dma2 1 4 QCOM_GPI_SPI>;
1260 #address-cells = <1>;
1291 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1300 #address-cells = <1>;
1312 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1322 #address-cells = <1>;
1372 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1381 #address-cells = <1>;
1393 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1403 #address-cells = <1>;
1416 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1417 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1426 #address-cells = <1>;
1437 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1438 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1448 #address-cells = <1>;
1462 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1471 #address-cells = <1>;
1483 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1493 #address-cells = <1>;
1524 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1533 #address-cells = <1>;
1545 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1555 #address-cells = <1>;
1569 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1578 #address-cells = <1>;
1590 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1600 #address-cells = <1>;
1614 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1623 #address-cells = <1>;
1635 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1645 #address-cells = <1>;
1659 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1668 #address-cells = <1>;
1680 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1690 #address-cells = <1>;
1721 <&gpi_dma0 1 7 QCOM_GPI_I2C>;
1730 #address-cells = <1>;
1742 <&gpi_dma0 1 7 QCOM_GPI_SPI>;
1752 #address-cells = <1>;
1799 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1808 #address-cells = <1>;
1820 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1830 #address-cells = <1>;
1843 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1844 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1853 #address-cells = <1>;
1864 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1865 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1875 #address-cells = <1>;
1889 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1898 #address-cells = <1>;
1910 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1920 #address-cells = <1>;
1934 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1943 #address-cells = <1>;
1955 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1965 #address-cells = <1>;
1979 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1988 #address-cells = <1>;
2000 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
2010 #address-cells = <1>;
2041 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
2050 #address-cells = <1>;
2062 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
2072 #address-cells = <1>;
2127 pcie0: pcie@1c00000 {
2139 num-lanes = <1>;
2157 #interrupt-cells = <1>;
2159 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2202 pcie0_phy: phy@1c06000 {
2231 pcie1: pcie@1c08000 {
2241 linux,pci-domain = <1>;
2253 #interrupt-cells = <1>;
2255 interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2303 pcie1_phy: phy@1c0e000 {
2332 pcie2: pcie@1c10000 {
2354 #interrupt-cells = <1>;
2356 interrupt-map = <0 0 0 1 &intc 0 290 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2404 pcie2_phy: phy@1c16000 {
2433 ufs_mem_hc: ufshc@1d84000 {
2441 #reset-cells = <1>;
2505 ufs_mem_phy: phy@1d87000 {
2522 cryptobam: dma-controller@1dc4000 {
2526 #dma-cells = <1>;
2539 crypto: crypto@1dfa000 {
2554 tcsr_mutex: hwlock@1f40000 {
2557 #hwlock-cells = <1>;
2560 tcsr: syscon@1fc0000 {
2579 #sound-dai-cells = <1>;
2602 #sound-dai-cells = <1>;
2612 #clock-cells = <1>;
2630 #sound-dai-cells = <1>;
2650 #sound-dai-cells = <1>;
2674 #sound-dai-cells = <1>;
2696 #sound-dai-cells = <1>;
2722 #sound-dai-cells = <1>;
2730 #clock-cells = <1>;
2754 slew-rate = <1>;
2762 slew-rate = <1>;
2819 slew-rate = <1>;
2827 slew-rate = <1>;
2837 slew-rate = <1>;
2845 slew-rate = <1>;
2994 #clock-cells = <1>;
2995 #reset-cells = <1>;
2996 #power-domain-cells = <1>;
3030 <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
3067 #address-cells = <1>;
3070 compute-cb@1 {
3072 reg = <1>;
3126 #address-cells = <1>;
3185 #address-cells = <1>;
3220 #address-cells = <1>;
3248 #address-cells = <1>;
3258 port@1 {
3259 reg = <1>;
3342 #address-cells = <1>;
3419 funnel@6c0b000 {
3435 #address-cells = <1>;
3463 #address-cells = <1>;
3643 #address-cells = <1>;
3653 port@1 {
3654 reg = <1>;
3734 <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
3769 #address-cells = <1>;
3772 compute-cb@1 {
3774 reg = <1>;
3869 #clock-cells = <1>;
3870 #phy-cells = <1>;
3873 #address-cells = <1>;
3881 port@1 {
3882 reg = <1>;
4300 #clock-cells = <1>;
4301 #reset-cells = <1>;
4302 #power-domain-cells = <1>;
4307 #address-cells = <1>;
4326 pinctrl-1 = <&cci0_sleep>;
4334 #address-cells = <1>;
4338 cci0_i2c1: i2c-bus@1 {
4339 reg = <1>;
4341 #address-cells = <1>;
4348 #address-cells = <1>;
4367 pinctrl-1 = <&cci1_sleep>;
4375 #address-cells = <1>;
4379 cci1_i2c1: i2c-bus@1 {
4380 reg = <1>;
4382 #address-cells = <1>;
4540 #address-cells = <1>;
4547 port@1 {
4548 reg = <1>;
4580 #clock-cells = <1>;
4581 #reset-cells = <1>;
4582 #power-domain-cells = <1>;
4604 #interrupt-cells = <1>;
4636 #address-cells = <1>;
4646 port@1 {
4647 reg = <1>;
4723 #address-cells = <1>;
4733 port@1 {
4734 reg = <1>;
4789 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
4798 #address-cells = <1>;
4802 #address-cells = <1>;
4812 port@1 {
4813 reg = <1>;
4848 #clock-cells = <1>;
4881 assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
4890 #address-cells = <1>;
4894 #address-cells = <1>;
4904 port@1 {
4905 reg = <1>;
4921 #clock-cells = <1>;
4939 <&mdss_dsi0_phy 1>,
4941 <&mdss_dsi1_phy 1>,
4951 #clock-cells = <1>;
4952 #reset-cells = <1>;
4953 #power-domain-cells = <1>;
4960 <125 63 1>, <126 716 12>;
4974 #thermal-sensor-cells = <1>;
4985 #thermal-sensor-cells = <1>;
5014 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
5892 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
5928 #address-cells = <1>;
5943 #address-cells = <1>;
5945 #sound-dai-cells = <1>;
5960 #address-cells = <1>;
5962 #sound-dai-cells = <1>;
5983 #address-cells = <1>;
6024 #address-cells = <1>;
6025 #size-cells = <1>;
6040 frame-number = <1>;
6088 reg-names = "drv-0", "drv-1", "drv-2";
6095 <WAKE_TCS 3>, <CONTROL_TCS 1>;
6100 #clock-cells = <1>;
6107 #power-domain-cells = <1>;
6167 #interconnect-cells = <1>;
6183 interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
6184 #freq-domain-cells = <1>;
6185 #clock-cells = <1>;
6209 thermal-sensors = <&tsens0 1>;
6822 thermal-sensors = <&tsens1 1>;