Lines Matching +full:0 +full:x11f40000
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
132 reg = <0x400>;
151 reg = <0x500>;
170 reg = <0x600>;
189 reg = <0x700>;
246 arm,psci-suspend-param = <0x00010001>;
255 arm,psci-suspend-param = <0x00010001>;
264 arm,psci-suspend-param = <0x01010002>;
273 arm,psci-suspend-param = <0x01010002>;
313 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
332 #clock-cells = <0>;
341 #clock-cells = <0>;
348 #clock-cells = <0>;
355 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
449 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
450 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
451 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
452 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
460 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
468 reg = <0 0x0c000000 0 0x40000>,
469 <0 0x0c040000 0 0x200000>;
470 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
473 ppi_cluster0: interrupt-partition-0 {
485 reg = <0 0x10000000 0 0x1000>;
491 reg = <0 0x10001000 0 0x1000>;
498 reg = <0 0x10003000 0 0x1000>;
504 reg = <0 0x10005000 0 0x1000>,
505 <0 0x11d10000 0 0x1000>,
506 <0 0x11d30000 0 0x1000>,
507 <0 0x11d40000 0 0x1000>,
508 <0 0x11e20000 0 0x1000>,
509 <0 0x11eb0000 0 0x1000>,
510 <0 0x11f40000 0 0x1000>,
511 <0 0x1000b000 0 0x1000>;
517 gpio-ranges = <&pio 0 0 144>;
519 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH 0>;
525 reg = <0 0x10006000 0 0x1000>;
531 #size-cells = <0>;
538 #size-cells = <0>;
548 #size-cells = <0>;
553 #power-domain-cells = <0>;
558 #power-domain-cells = <0>;
563 #power-domain-cells = <0>;
568 #power-domain-cells = <0>;
573 #power-domain-cells = <0>;
609 "vppsys0-0", "vppsys0-1", "vppsys0-2", "vppsys0-3",
617 #size-cells = <0>;
623 clock-names = "vdec1-0";
625 #power-domain-cells = <0>;
633 #power-domain-cells = <0>;
645 clock-names = "vdosys0", "vdosys0-0", "vdosys0-1",
650 #size-cells = <0>;
658 clock-names = "vppsys1", "vppsys1-0",
661 #power-domain-cells = <0>;
670 clock-names = "wepsys-0", "wepsys-1", "wepsys-2",
673 #power-domain-cells = <0>;
679 clock-names = "vdec0-0";
681 #power-domain-cells = <0>;
687 clock-names = "vdec2-0";
689 #power-domain-cells = <0>;
697 #power-domain-cells = <0>;
706 clock-names = "vdosys1", "vdosys1-0",
710 #size-cells = <0>;
716 #power-domain-cells = <0>;
722 #power-domain-cells = <0>;
729 #power-domain-cells = <0>;
737 clock-names = "img-0", "img-1";
740 #size-cells = <0>;
745 #power-domain-cells = <0>;
753 clock-names = "ipe", "ipe-0", "ipe-1";
755 #power-domain-cells = <0>;
766 clock-names = "cam-0", "cam-1", "cam-2", "cam-3",
770 #size-cells = <0>;
775 #power-domain-cells = <0>;
780 #power-domain-cells = <0>;
785 #power-domain-cells = <0>;
794 #power-domain-cells = <0>;
800 #power-domain-cells = <0>;
805 #power-domain-cells = <0>;
810 #power-domain-cells = <0>;
818 #power-domain-cells = <0>;
825 #power-domain-cells = <0>;
834 #size-cells = <0>;
847 #power-domain-cells = <0>;
856 reg = <0 0x10007000 0 0x100>;
862 reg = <0 0x1000c000 0 0x1000>;
869 reg = <0 0x10017000 0 0x1000>;
870 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
876 reg = <0 0x10024000 0 0x1000>;
878 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
888 reg = <0 0x10027000 0 0x000e00>,
889 <0 0x10029000 0 0x000100>;
903 reg = <0 0x10315000 0 0x5000>;
904 interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH 0>,
905 <GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH 0>,
906 <GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH 0>,
907 <GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH 0>,
908 <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH 0>;
914 reg = <0 0x10320000 0 0x4000>;
915 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
922 reg = <0 0x10330000 0 0x4000>;
923 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
930 reg = <0 0x10500000 0 0x100000>,
931 <0 0x10720000 0 0xe0000>,
932 <0 0x10700000 0 0x8000>;
934 interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
940 reg = <0 0x10720000 0 0x1000>;
946 reg = <0 0x10803000 0 0x1000>,
947 <0 0x10840000 0 0x40000>;
969 #mbox-cells = <0>;
970 reg = <0 0x10816000 0 0x1000>;
971 interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
976 #mbox-cells = <0>;
977 reg = <0 0x10817000 0 0x1000>;
978 interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>;
983 reg = <0 0x10890000 0 0x10000>;
986 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
1033 reg = <0 0x11001100 0 0x100>;
1034 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
1043 reg = <0 0x11001200 0 0x100>;
1044 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1053 reg = <0 0x11001300 0 0x100>;
1054 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1063 reg = <0 0x11001400 0 0x100>;
1064 interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
1073 reg = <0 0x11001500 0 0x100>;
1074 interrupts = <GIC_SPI 724 IRQ_TYPE_LEVEL_HIGH 0>;
1083 reg = <0 0x11001600 0 0x100>;
1084 interrupts = <GIC_SPI 725 IRQ_TYPE_LEVEL_HIGH 0>;
1093 reg = <0 0x11002000 0 0x1000>;
1102 reg = <0 0x11003000 0 0x1000>;
1110 #size-cells = <0>;
1111 reg = <0 0x1100a000 0 0x1000>;
1112 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0>;
1122 reg = <0 0x1100b000 0 0xc00>;
1123 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
1133 reg = <0 0x1100bc00 0 0x400>;
1134 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 0>;
1145 reg = <0 0x1100e000 0 0x1000>;
1146 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_LOW 0>;
1157 reg = <0 0x1100f000 0 0x1000>;
1158 interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>;
1170 #size-cells = <0>;
1171 reg = <0 0x11010000 0 0x1000>;
1172 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0>;
1184 #size-cells = <0>;
1185 reg = <0 0x11012000 0 0x1000>;
1186 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
1198 #size-cells = <0>;
1199 reg = <0 0x11013000 0 0x1000>;
1200 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1212 #size-cells = <0>;
1213 reg = <0 0x11018000 0 0x1000>;
1214 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
1226 #size-cells = <0>;
1227 reg = <0 0x11019000 0 0x1000>;
1228 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
1238 reg = <0 0x1101d000 0 0x1000>;
1239 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 0>;
1249 reg = <0 0x1101e000 0 0x1000>;
1250 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH 0>;
1260 reg = <0 0x11021000 0 0x4000>;
1261 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
1288 snps,clk-csr = <0>;
1294 #size-cells = <0>;
1298 snps,wr_osr_lmt = <0x7>;
1299 snps,rd_osr_lmt = <0x7>;
1300 snps,blen = <0 0 0 0 16 8 4>;
1308 snps,map-to-dma-channel = <0x0>;
1312 snps,map-to-dma-channel = <0x0>;
1316 snps,map-to-dma-channel = <0x0>;
1320 snps,map-to-dma-channel = <0x0>;
1328 snps,weight = <0x10>;
1330 snps,priority = <0x0>;
1333 snps,weight = <0x11>;
1335 snps,priority = <0x1>;
1338 snps,weight = <0x12>;
1340 snps,priority = <0x2>;
1343 snps,weight = <0x13>;
1345 snps,priority = <0x3>;
1353 reg = <0 0x11200000 0 0x1000>,
1354 <0 0x11203e00 0 0x0100>;
1356 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
1370 mediatek,syscon-wakeup = <&pericfg 0x400 103>;
1378 reg = <0 0x11230000 0 0x10000>,
1379 <0 0x11f50000 0 0x1000>;
1380 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1391 reg = <0 0x11240000 0 0x1000>,
1392 <0 0x11c70000 0 0x1000>;
1393 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
1406 reg = <0 0x11250000 0 0x1000>,
1407 <0 0x11e60000 0 0x1000>;
1408 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>;
1420 reg = <0 0x11278000 0 0x1000>;
1421 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
1432 reg = <0 0x11290000 0 0x1000>,
1433 <0 0x11293e00 0 0x0100>;
1435 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH 0>;
1448 mediatek,syscon-wakeup = <&pericfg 0x400 104>;
1456 reg = <0 0x112a0000 0 0x1000>,
1457 <0 0x112a3e00 0 0x0100>;
1459 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
1472 mediatek,syscon-wakeup = <&pericfg 0x400 105>;
1480 reg = <0 0x112b0000 0 0x1000>,
1481 <0 0x112b3e00 0 0x0100>;
1483 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
1496 mediatek,syscon-wakeup = <&pericfg 0x400 106>;
1507 reg = <0 0x112f0000 0 0x4000>;
1509 interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH 0>;
1510 bus-range = <0x00 0xff>;
1511 ranges = <0x81000000 0 0x20000000
1512 0x0 0x20000000 0 0x200000>,
1513 <0x82000000 0 0x20200000
1514 0x0 0x20200000 0 0x3e00000>;
1516 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE0 0x2>;
1517 iommu-map-mask = <0x0>;
1539 interrupt-map-mask = <0 0 0 7>;
1540 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
1541 <0 0 0 2 &pcie_intc0 1>,
1542 <0 0 0 3 &pcie_intc0 2>,
1543 <0 0 0 4 &pcie_intc0 3>;
1548 #address-cells = <0>;
1559 reg = <0 0x112f8000 0 0x4000>;
1561 interrupts = <GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH 0>;
1562 bus-range = <0x00 0xff>;
1563 ranges = <0x81000000 0 0x24000000
1564 0x0 0x24000000 0 0x200000>,
1565 <0x82000000 0 0x24200000
1566 0x0 0x24200000 0 0x3e00000>;
1568 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE1 0x2>;
1569 iommu-map-mask = <0x0>;
1591 interrupt-map-mask = <0 0 0 7>;
1592 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
1593 <0 0 0 2 &pcie_intc1 1>,
1594 <0 0 0 3 &pcie_intc1 2>,
1595 <0 0 0 4 &pcie_intc1 3>;
1600 #address-cells = <0>;
1608 reg = <0 0x1132c000 0 0x1000>;
1609 interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
1615 #size-cells = <0>;
1621 reg = <0 0x11c10000 0 0x1000>;
1625 reg = <0x184 0x1>;
1626 bits = <0 5>;
1629 reg = <0x184 0x2>;
1633 reg = <0x185 0x1>;
1637 reg = <0x186 0x1>;
1638 bits = <0 5>;
1641 reg = <0x186 0x2>;
1645 reg = <0x187 0x1>;
1649 reg = <0x188 0x1>;
1650 bits = <0 5>;
1653 reg = <0x188 0x2>;
1657 reg = <0x189 0x1>;
1661 reg = <0x189 0x2>;
1665 reg = <0x190 0x1>;
1666 bits = <0 4>;
1669 reg = <0x190 0x1>;
1673 reg = <0x191 0x1>;
1674 bits = <0 4>;
1677 reg = <0x191 0x1>;
1681 reg = <0x192 0x1>;
1682 bits = <0 4>;
1685 reg = <0x192 0x1>;
1689 reg = <0x193 0x1>;
1690 bits = <0 4>;
1693 reg = <0x1ac 0x10>;
1696 reg = <0x1bc 0x14>;
1699 reg = <0x1d0 0x38>;
1702 reg = <0x580 0x64>;
1710 ranges = <0 0 0x11c40000 0x700>;
1713 u2port2: usb-phy@0 {
1714 reg = <0x0 0x700>;
1725 ranges = <0 0 0x11c50000 0x700>;
1728 u2port3: usb-phy@0 {
1729 reg = <0x0 0x700>;
1738 reg = <0 0x11c80000 0 0x1000>;
1741 #clock-cells = <0>;
1742 #phy-cells = <0>;
1748 reg = <0 0x11c90000 0 0x1000>;
1751 #clock-cells = <0>;
1752 #phy-cells = <0>;
1759 reg = <0 0x11d00000 0 0x1000>,
1760 <0 0x10220580 0 0x80>;
1761 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH 0>;
1767 #size-cells = <0>;
1774 reg = <0 0x11d01000 0 0x1000>,
1775 <0 0x10220600 0 0x80>;
1776 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
1782 #size-cells = <0>;
1789 reg = <0 0x11d02000 0 0x1000>,
1790 <0 0x10220680 0 0x80>;
1791 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
1797 #size-cells = <0>;
1803 reg = <0 0x11d03000 0 0x1000>;
1810 reg = <0 0x11e00000 0 0x1000>,
1811 <0 0x10220080 0 0x80>;
1812 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0>;
1818 #size-cells = <0>;
1825 reg = <0 0x11e01000 0 0x1000>,
1826 <0 0x10220200 0 0x80>;
1827 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>;
1833 #size-cells = <0>;
1840 reg = <0 0x11e02000 0 0x1000>,
1841 <0 0x10220380 0 0x80>;
1842 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
1848 #size-cells = <0>;
1855 reg = <0 0x11e03000 0 0x1000>,
1856 <0 0x10220480 0 0x80>;
1857 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
1863 #size-cells = <0>;
1870 reg = <0 0x11e04000 0 0x1000>,
1871 <0 0x10220500 0 0x80>;
1872 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
1878 #size-cells = <0>;
1884 reg = <0 0x11e05000 0 0x1000>;
1892 ranges = <0 0 0x11e30000 0xe00>;
1896 u2port1: usb-phy@0 {
1897 reg = <0x0 0x700>;
1905 reg = <0x700 0x700>;
1921 ranges = <0 0 0x11e40000 0xe00>;
1924 u2port0: usb-phy@0 {
1925 reg = <0x0 0x700>;
1933 reg = <0x700 0x700>;
1947 reg = <0 0x11e80000 0 0x10000>;
1958 #phy-cells = <0>;
1964 reg = <0 0x11fa0000 0 0xc000>;
1967 #phy-cells = <0>;
1974 reg = <0 0x13000000 0 0x4000>;
1977 interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>,
1978 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH 0>,
1979 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH 0>;
1993 reg = <0 0x13fbf000 0 0x1000>;
1999 reg = <0 0x14000000 0 0x1000>;
2005 reg = <0 0x14001000 0 0x1000>;
2006 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x1000 0x1000>;
2022 reg = <0 0x14002000 0 0x1000>;
2023 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>;
2029 reg = <0 0x14003000 0 0x1000>;
2030 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>;
2036 reg = <0 0x14004000 0 0x1000>;
2037 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>;
2043 reg = <0 0x14005000 0 0x1000>;
2044 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH 0>;
2045 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x5000 0x1000>;
2052 reg = <0 0x14006000 0 0x1000>;
2053 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x6000 0x1000>;
2061 reg = <0 0x14007000 0 0x1000>;
2062 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>;
2068 reg = <0 0x14008000 0 0x1000>;
2069 interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0>;
2070 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x8000 0x1000>;
2077 reg = <0 0x14009000 0 0x1000>;
2078 interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH 0>;
2079 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x9000 0x1000>;
2087 reg = <0 0x1400a000 0 0x1000>;
2088 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xa000 0x1000>;
2095 reg = <0 0x1400b000 0 0x1000>;
2096 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
2102 reg = <0 0x1400c000 0 0x1000>;
2103 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xc000 0x1000>;
2114 reg = <0 0x1400f000 0 0x1000>;
2115 interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
2116 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
2123 reg = <0 0x14010000 0 0x1000>;
2134 reg = <0 0x14011000 0 0x1000>;
2145 reg = <0 0x14012000 0 0x1000>;
2156 reg = <0 0x14013000 0 0x1000>;
2167 reg = <0 0x14018000 0 0x1000>;
2172 interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0>;
2181 reg = <0 0x14e00000 0 0x1000>;
2187 reg = <0 0x14e02000 0 0x1000>;
2193 reg = <0 0x14e03000 0 0x1000>;
2199 reg = <0 0x14e04000 0 0x1000>;
2210 reg = <0 0x14e05000 0 0x1000>;
2222 reg = <0 0x14f00000 0 0x1000>;
2228 reg = <0 0x14f01000 0 0x1000>;
2229 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
2230 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
2237 reg = <0 0x14f02000 0 0x1000>;
2249 reg = <0 0x14f03000 0 0x1000>;
2261 reg = <0 0x14f06000 0 0x1000>;
2262 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x6000 0x1000>;
2271 reg = <0 0x14f07000 0 0x1000>;
2272 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x7000 0x1000>;
2278 reg = <0 0x14f08000 0 0x1000>;
2279 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x8000 0x1000>;
2290 reg = <0 0x14f09000 0 0x1000>;
2291 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x9000 0x1000>;
2302 reg = <0 0x14f0a000 0 0x1000>;
2303 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xa000 0x1000>;
2314 reg = <0 0x14f0b000 0 0x1000>;
2315 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xb000 0x1000>;
2321 reg = <0 0x14f0c000 0 0x1000>;
2322 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xc000 0x1000>;
2328 reg = <0 0x14f0d000 0 0x1000>;
2329 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xd000 0x1000>;
2335 reg = <0 0x14f0e000 0 0x1000>;
2336 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xe000 0x1000>;
2342 reg = <0 0x14f0f000 0 0x1000>;
2343 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xf000 0x1000>;
2349 reg = <0 0x14f10000 0 0x1000>;
2350 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0 0x1000>;
2356 reg = <0 0x14f11000 0 0x1000>;
2357 interrupts = <GIC_SPI 617 IRQ_TYPE_LEVEL_HIGH 0>;
2358 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x1000 0x1000>;
2365 reg = <0 0x14f12000 0 0x1000>;
2366 interrupts = <GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH 0>;
2367 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x2000 0x1000>;
2374 reg = <0 0x14f13000 0 0x1000>;
2375 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH 0>;
2376 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x3000 0x1000>;
2383 reg = <0 0x14f14000 0 0x1000>;
2384 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x4000 0x1000>;
2392 reg = <0 0x14f15000 0 0x1000>;
2393 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x5000 0x1000>;
2401 reg = <0 0x14f16000 0 0x1000>;
2402 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x6000 0x1000>;
2410 reg = <0 0x14f17000 0 0x1000>;
2411 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x7000 0x1000>;
2417 reg = <0 0x14f18000 0 0x1000>;
2418 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x8000 0x1000>;
2424 reg = <0 0x14f19000 0 0x1000>;
2425 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x9000 0x1000>;
2431 reg = <0 0x14f1a000 0 0x1000>;
2432 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xa000 0x1000>;
2439 reg = <0 0x14f1b000 0 0x1000>;
2440 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xb000 0x1000>;
2447 reg = <0 0x14f1c000 0 0x1000>;
2448 interrupts = <GIC_SPI 628 IRQ_TYPE_LEVEL_HIGH 0>;
2449 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xc000 0x1000>;
2456 reg = <0 0x14f1d000 0 0x1000>;
2457 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xd000 0x1000>;
2458 interrupts = <GIC_SPI 629 IRQ_TYPE_LEVEL_HIGH 0>;
2465 reg = <0 0x14f1e000 0 0x1000>;
2466 interrupts = <GIC_SPI 630 IRQ_TYPE_LEVEL_HIGH 0>;
2467 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xe000 0x1000>;
2474 reg = <0 0x14f1f000 0 0x1000>;
2475 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH 0>;
2476 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xf000 0x1000>;
2484 reg = <0 0x14f20000 0 0x1000>;
2485 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0 0x1000>;
2492 reg = <0 0x14f21000 0 0x1000>;
2493 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x1000 0x1000>;
2500 reg = <0 0x14f22000 0 0x1000>;
2501 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x2000 0x1000>;
2508 reg = <0 0x14f23000 0 0x1000>;
2509 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x3000 0x1000>;
2520 reg = <0 0x14f24000 0 0x1000>;
2521 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x4000 0x1000>;
2532 reg = <0 0x14f25000 0 0x1000>;
2533 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x5000 0x1000>;
2544 reg = <0 0x15000000 0 0x1000>;
2550 reg = <0 0x15001000 0 0x1000>;
2562 reg = <0 0x15002000 0 0x1000>;
2573 reg = <0 0x15003000 0 0x1000>;
2584 reg = <0 0x15110000 0 0x1000>;
2590 reg = <0 0x15120000 0 0x1000>;
2601 reg = <0 0x15130000 0 0x1000>;
2607 reg = <0 0x15220000 0 0x1000>;
2613 reg = <0 0x15230000 0 0x1000>;
2624 reg = <0 0x15330000 0 0x1000>;
2630 reg = <0 0x15340000 0 0x1000>;
2641 reg = <0 0x16000000 0 0x1000>;
2647 reg = <0 0x16001000 0 0x1000>;
2659 reg = <0 0x16002000 0 0x1000>;
2670 reg = <0 0x16004000 0 0x1000>;
2681 reg = <0 0x16005000 0 0x1000>;
2692 reg = <0 0x16012000 0 0x1000>;
2703 reg = <0 0x16013000 0 0x1000>;
2714 reg = <0 0x16014000 0 0x1000>;
2725 reg = <0 0x16015000 0 0x1000>;
2736 reg = <0 0x1604f000 0 0x1000>;
2742 reg = <0 0x1606f000 0 0x1000>;
2748 reg = <0 0x1608f000 0 0x1000>;
2754 reg = <0 0x160af000 0 0x1000>;
2760 reg = <0 0x16140000 0 0x1000>;
2766 reg = <0 0x16141000 0 0x1000>;
2778 reg = <0 0x16142000 0 0x1000>;
2790 reg = <0 0x17200000 0 0x1000>;
2796 reg = <0 0x17201000 0 0x1000>;
2811 reg = <0 0x18000000 0 0x1000>,
2812 <0 0x18004000 0 0x1000>;
2813 ranges = <0 0 0 0x18000000 0 0x26000>;
2817 reg = <0 0x2000 0 0x800>;
2832 reg = <0 0x10000 0 0x800>;
2833 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
2852 reg = <0 0x25000 0 0x1000>; /* VDEC_CORE_MISC */
2853 interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
2877 reg = <0 0x1800d000 0 0x1000>;
2888 reg = <0 0x1800e000 0 0x1000>;
2899 reg = <0 0x1800f000 0 0x1000>;
2905 reg = <0 0x1802e000 0 0x1000>;
2916 reg = <0 0x1802f000 0 0x1000>;
2922 reg = <0 0x1803e000 0 0x1000>;
2933 reg = <0 0x1803f000 0 0x1000>;
2939 reg = <0 0x190f3000 0 0x1000>;
2945 reg = <0 0x1a000000 0 0x1000>;
2951 reg = <0 0x1a010000 0 0x1000>;
2962 reg = <0 0x1a020000 0 0x10000>;
2972 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>;
2998 reg = <0 0x1a040000 0 0x10000>;/* JPGDEC_C0 */
3005 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
3013 reg = <0 0x1a050000 0 0x10000>;/* JPGDEC_C1 */
3020 interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0>;
3028 reg = <0 0x1b040000 0 0x10000>;/* JPGDEC_C2 */
3035 interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 0>;
3044 reg = <0 0x1b000000 0 0x1000>;
3050 reg = <0 0x1c01a000 0 0x1000>;
3051 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
3069 reg = <0 0x1a030000 0 0x10000>;
3074 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
3082 reg = <0 0x1b030000 0 0x10000>;
3087 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0>;
3096 reg = <0 0x1b010000 0 0x1000>;
3108 reg = <0 0x1c000000 0 0x1000>;
3109 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
3113 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x0000 0x1000>;
3118 reg = <0 0x1c002000 0 0x1000>;
3119 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
3123 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x2000 0x1000>;
3128 reg = <0 0x1c003000 0 0x1000>;
3129 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
3132 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x3000 0x1000>;
3137 reg = <0 0x1c004000 0 0x1000>;
3138 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
3141 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x4000 0x1000>;
3146 reg = <0 0x1c005000 0 0x1000>;
3147 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
3150 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
3155 reg = <0 0x1c006000 0 0x1000>;
3156 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
3159 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x6000 0x1000>;
3164 reg = <0 0x1c007000 0 0x1000>;
3165 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
3168 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x7000 0x1000>;
3173 reg = <0 0x1c008000 0 0x1000>;
3174 interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
3187 reg = <0 0x1c009000 0 0x1000>;
3188 interrupts = <GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0>;
3191 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x9000 0x1000>;
3196 reg = <0 0x1c012000 0 0x1000>;
3197 interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
3210 reg = <0 0x1c014000 0 0x1000>;
3211 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
3214 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>;
3219 reg = <0 0x1c015000 0 0x1000>;
3220 interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
3230 reg = <0 0x1c016000 0 0x1000>;
3231 interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
3239 reg = <0 0x1c018000 0 0x1000>;
3240 mediatek,larb-id = <0>;
3251 reg = <0 0x1c019000 0 0x1000>;
3263 reg = <0 0x1c100000 0 0x1000>;
3265 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x0000 0x1000>;
3272 reg = <0 0x1c01b000 0 0x1000>;
3284 reg = <0 0x1c01f000 0 0x1000>;
3289 interrupts = <GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH 0>;
3298 reg = <0 0x1c101000 0 0x1000>;
3300 interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
3309 reg = <0 0x1c102000 0 0x1000>;
3321 reg = <0 0x1c103000 0 0x1000>;
3333 reg = <0 0x1c104000 0 0x1000>;
3334 interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
3338 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
3344 reg = <0 0x1c105000 0 0x1000>;
3345 interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>;
3349 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x5000 0x1000>;
3355 reg = <0 0x1c106000 0 0x1000>;
3356 interrupts = <GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH 0>;
3360 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x6000 0x1000>;
3366 reg = <0 0x1c107000 0 0x1000>;
3367 interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH 0>;
3371 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x7000 0x1000>;
3377 reg = <0 0x1c108000 0 0x1000>;
3378 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH 0>;
3382 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x8000 0x1000>;
3388 reg = <0 0x1c109000 0 0x1000>;
3389 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH 0>;
3393 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x9000 0x1000>;
3399 reg = <0 0x1c10a000 0 0x1000>;
3400 interrupts = <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH 0>;
3404 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xa000 0x1000>;
3410 reg = <0 0x1c10b000 0 0x1000>;
3411 interrupts = <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH 0>;
3415 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xb000 0x1000>;
3421 reg = <0 0x1c10c000 0 0x1000>;
3422 interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
3427 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
3434 reg = <0 0x1c10d000 0 0x1000>;
3435 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH 0>;
3440 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
3447 reg = <0 0x1c10e000 0 0x1000>;
3448 interrupts = <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH 0>;
3453 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
3460 reg = <0 0x1c10f000 0 0x1000>;
3461 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0>;
3466 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
3473 reg = <0 0x1c110000 0 0x1000>;
3474 interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>;
3479 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
3486 reg = <0 0x1c113000 0 0x1000>;
3487 interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0>;
3498 reg = <0 0x1c114000 0 0x1000>,
3499 <0 0x1c115000 0 0x1000>,
3500 <0 0x1c117000 0 0x1000>,
3501 <0 0x1c119000 0 0x1000>,
3502 <0 0x1c11a000 0 0x1000>,
3503 <0 0x1c11b000 0 0x1000>,
3504 <0 0x1c11c000 0 0x1000>;
3507 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x4000 0x1000>,
3508 <&gce0 SUBSYS_1c11XXXX 0x5000 0x1000>,
3509 <&gce0 SUBSYS_1c11XXXX 0x7000 0x1000>,
3510 <&gce0 SUBSYS_1c11XXXX 0x9000 0x1000>,
3511 <&gce0 SUBSYS_1c11XXXX 0xa000 0x1000>,
3512 <&gce0 SUBSYS_1c11XXXX 0xb000 0x1000>,
3513 <&gce0 SUBSYS_1c11XXXX 0xc000 0x1000>;
3534 interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH 0>; /* disp mixer */
3546 reg = <0 0x1c500000 0 0x8000>;
3550 interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
3557 reg = <0 0x1c600000 0 0x8000>;
3561 interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;