Lines Matching +full:cros +full:- +full:cbas
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
39 num-interpolated-steps = <1023>;
40 default-brightness-level = <576>;
43 dmic_codec: dmic-codec {
44 compatible = "dmic-codec";
45 num-channels = <2>;
46 wakeup-delay-ms = <50>;
49 pp1000_dpbrdg: regulator-1v0-dpbrdg {
50 compatible = "regulator-fixed";
51 regulator-name = "pp1000_dpbrdg";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pp1000_dpbrdg_en_pins>;
54 regulator-min-microvolt = <1000000>;
55 regulator-max-microvolt = <1000000>;
56 enable-active-high;
57 regulator-boot-on;
59 vin-supply = <&mt6359_vs2_buck_reg>;
62 pp1000_mipibrdg: regulator-1v0-mipibrdg {
63 compatible = "regulator-fixed";
64 regulator-name = "pp1000_mipibrdg";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pp1000_mipibrdg_en_pins>;
67 regulator-min-microvolt = <1000000>;
68 regulator-max-microvolt = <1000000>;
69 enable-active-high;
70 regulator-boot-on;
72 vin-supply = <&mt6359_vs2_buck_reg>;
75 pp1800_dpbrdg: regulator-1v8-dpbrdg {
76 compatible = "regulator-fixed";
77 regulator-name = "pp1800_dpbrdg";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pp1800_dpbrdg_en_pins>;
80 enable-active-high;
81 regulator-boot-on;
83 vin-supply = <&mt6359_vio18_ldo_reg>;
87 pp1800_ldo_g: regulator-1v8-g {
88 compatible = "regulator-fixed";
89 regulator-name = "pp1800_ldo_g";
90 regulator-always-on;
91 regulator-boot-on;
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&pp3300_g>;
97 pp1800_mipibrdg: regulator-1v8-mipibrdg {
98 compatible = "regulator-fixed";
99 regulator-name = "pp1800_mipibrdg";
100 pinctrl-names = "default";
101 pinctrl-0 = <&pp1800_mipibrdg_en_pins>;
102 enable-active-high;
103 regulator-boot-on;
105 vin-supply = <&mt6359_vio18_ldo_reg>;
108 pp3300_dpbrdg: regulator-3v3-dpbrdg {
109 compatible = "regulator-fixed";
110 regulator-name = "pp3300_dpbrdg";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pp3300_dpbrdg_en_pins>;
113 enable-active-high;
114 regulator-boot-on;
116 vin-supply = <&pp3300_g>;
120 pp3300_g: regulator-3v3-g {
121 compatible = "regulator-fixed";
122 regulator-name = "pp3300_g";
123 regulator-always-on;
124 regulator-boot-on;
125 regulator-min-microvolt = <3300000>;
126 regulator-max-microvolt = <3300000>;
127 vin-supply = <&ppvar_sys>;
131 pp3300_ldo_z: regulator-3v3-z {
132 compatible = "regulator-fixed";
133 regulator-name = "pp3300_ldo_z";
134 regulator-always-on;
135 regulator-boot-on;
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 vin-supply = <&ppvar_sys>;
141 pp3300_mipibrdg: regulator-3v3-mipibrdg {
142 compatible = "regulator-fixed";
143 regulator-name = "pp3300_mipibrdg";
144 pinctrl-names = "default";
145 pinctrl-0 = <&pp3300_mipibrdg_en_pins>;
146 enable-active-high;
147 regulator-boot-on;
149 vin-supply = <&pp3300_g>;
153 pp3300_u: regulator-3v3-u {
154 compatible = "regulator-fixed";
155 regulator-name = "pp3300_u";
156 regulator-always-on;
157 regulator-boot-on;
158 regulator-min-microvolt = <3300000>;
159 regulator-max-microvolt = <3300000>;
161 vin-supply = <&pp3300_g>;
164 pp3300_wlan: regulator-3v3-wlan {
165 compatible = "regulator-fixed";
166 regulator-name = "pp3300_wlan";
167 regulator-always-on;
168 regulator-boot-on;
169 regulator-min-microvolt = <3300000>;
170 regulator-max-microvolt = <3300000>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&pp3300_wlan_pins>;
173 enable-active-high;
178 pp5000_a: regulator-5v0-a {
179 compatible = "regulator-fixed";
180 regulator-name = "pp5000_a";
181 regulator-always-on;
182 regulator-boot-on;
183 regulator-min-microvolt = <5000000>;
184 regulator-max-microvolt = <5000000>;
185 vin-supply = <&ppvar_sys>;
188 /* system wide semi-regulated power rail from battery or USB */
189 ppvar_sys: regulator-var-sys {
190 compatible = "regulator-fixed";
191 regulator-name = "ppvar_sys";
192 regulator-always-on;
193 regulator-boot-on;
196 reserved_memory: reserved-memory {
197 #address-cells = <2>;
198 #size-cells = <2>;
202 compatible = "shared-dma-pool";
204 no-map;
208 compatible = "restricted-dma-pool";
213 rt1015p: audio-codec {
215 pinctrl-names = "default";
216 pinctrl-0 = <&rt1015p_pins>;
217 sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>;
218 #sound-dai-cells = <0>;
223 pinctrl-names = "aud_clk_mosi_off",
249 pinctrl-0 = <&aud_clk_mosi_off_pins>;
250 pinctrl-1 = <&aud_clk_mosi_on_pins>;
251 pinctrl-2 = <&aud_dat_mosi_off_pins>;
252 pinctrl-3 = <&aud_dat_mosi_on_pins>;
253 pinctrl-4 = <&aud_dat_miso_off_pins>;
254 pinctrl-5 = <&aud_dat_miso_on_pins>;
255 pinctrl-6 = <&vow_dat_miso_off_pins>;
256 pinctrl-7 = <&vow_dat_miso_on_pins>;
257 pinctrl-8 = <&vow_clk_miso_off_pins>;
258 pinctrl-9 = <&vow_clk_miso_on_pins>;
259 pinctrl-10 = <&aud_nle_mosi_off_pins>;
260 pinctrl-11 = <&aud_nle_mosi_on_pins>;
261 pinctrl-12 = <&aud_dat_miso2_off_pins>;
262 pinctrl-13 = <&aud_dat_miso2_on_pins>;
263 pinctrl-14 = <&aud_gpio_i2s3_off_pins>;
264 pinctrl-15 = <&aud_gpio_i2s3_on_pins>;
265 pinctrl-16 = <&aud_gpio_i2s8_off_pins>;
266 pinctrl-17 = <&aud_gpio_i2s8_on_pins>;
267 pinctrl-18 = <&aud_gpio_i2s9_off_pins>;
268 pinctrl-19 = <&aud_gpio_i2s9_on_pins>;
269 pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>;
270 pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>;
271 pinctrl-22 = <&aud_dat_miso_ch34_off_pins>;
272 pinctrl-23 = <&aud_dat_miso_ch34_on_pins>;
273 pinctrl-24 = <&aud_gpio_tdm_off_pins>;
274 pinctrl-25 = <&aud_gpio_tdm_on_pins>;
283 remote-endpoint = <&anx7625_in>;
287 mediatek,broken-save-restore-fw;
291 mali-supply = <&mt6315_7_vbuck1>;
298 clock-frequency = <400000>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&i2c0_pins>;
304 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&touchscreen_pins>;
313 clock-frequency = <400000>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&i2c1_pins>;
317 rt5682: audio-codec@1a {
320 interrupts-extended = <&pio 18 IRQ_TYPE_LEVEL_LOW>;
321 realtek,jd-src = <1>;
322 #sound-dai-cells = <1>;
324 AVDD-supply = <&mt6359_vio18_ldo_reg>;
325 DBVDD-supply = <&mt6359_vio18_ldo_reg>;
326 LDO1-IN-supply = <&mt6359_vio18_ldo_reg>;
327 MICVDD-supply = <&pp3300_g>;
334 clock-frequency = <400000>;
335 clock-stretch-ns = <12600>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&i2c2_pins>;
342 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
343 pinctrl-names = "default";
344 pinctrl-0 = <&trackpad_pins>;
345 vcc-supply = <&pp3300_u>;
346 wakeup-source;
353 clock-frequency = <400000>;
354 pinctrl-names = "default";
355 pinctrl-0 = <&i2c3_pins>;
360 pinctrl-names = "default";
361 pinctrl-0 = <&anx7625_pins>;
362 enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>;
363 reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
364 vdd10-supply = <&pp1000_mipibrdg>;
365 vdd18-supply = <&pp1800_mipibrdg>;
366 vdd33-supply = <&pp3300_mipibrdg>;
369 #address-cells = <1>;
370 #size-cells = <0>;
376 remote-endpoint = <&dsi_out>;
384 remote-endpoint = <&panel_in>;
389 aux-bus {
391 compatible = "edp-panel";
392 power-supply = <&pp3300_mipibrdg>;
397 remote-endpoint = <&anx7625_out>;
408 clock-frequency = <400000>;
409 pinctrl-names = "default";
410 pinctrl-0 = <&i2c7_pins>;
414 domain-supply = <&mt6315_7_vbuck1>;
418 domain-supply = <&mt6359_vsram_others_ldo_reg>;
428 pinctrl-names = "default", "state_uhs";
429 pinctrl-0 = <&mmc0_default_pins>;
430 pinctrl-1 = <&mmc0_uhs_pins>;
431 bus-width = <8>;
432 max-frequency = <200000000>;
433 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
434 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
435 cap-mmc-highspeed;
436 mmc-hs200-1_8v;
437 mmc-hs400-1_8v;
438 supports-cqe;
439 cap-mmc-hw-reset;
440 mmc-hs400-enhanced-strobe;
441 hs400-ds-delay = <0x12814>;
442 no-sdio;
443 no-sd;
444 non-removable;
450 pinctrl-names = "default", "state_uhs";
451 pinctrl-0 = <&mmc1_default_pins>;
452 pinctrl-1 = <&mmc1_uhs_pins>;
453 bus-width = <4>;
454 max-frequency = <200000000>;
455 cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
456 vmmc-supply = <&mt6360_ldo5_reg>;
457 vqmmc-supply = <&mt6360_ldo3_reg>;
458 cap-sd-highspeed;
459 sd-uhs-sdr50;
460 sd-uhs-sdr104;
461 no-sdio;
462 no-mmc;
467 regulator-always-on;
471 regulator-always-on;
472 regulator-min-microvolt = <575000>;
473 regulator-max-microvolt = <575000>;
477 regulator-always-on;
481 regulator-min-microvolt = <750000>;
482 regulator-max-microvolt = <800000>;
483 regulator-coupled-with = <&mt6315_7_vbuck1>;
484 regulator-coupled-max-spread = <10000>;
488 regulator-always-on;
492 mediatek,dmic-mode = <1>; /* one-wire */
493 mediatek,mic-type-0 = <2>; /* DMIC */
494 mediatek,mic-type-2 = <2>; /* DMIC */
500 pinctrl-names = "default";
501 pinctrl-0 = <&nor_flash_pins>;
502 assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
503 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
506 compatible = "winbond,w25q64jwm", "jedec,spi-nor";
508 spi-max-frequency = <52000000>;
509 spi-rx-bus-width = <2>;
510 spi-tx-bus-width = <2>;
515 pinctrl-names = "default";
516 pinctrl-0 = <&pcie_pins>;
521 num-lanes = <1>;
522 bus-range = <0x1 0x1>;
524 #address-cells = <3>;
525 #size-cells = <2>;
531 memory-region = <&wifi_restricted_dma_region>;
538 gpio-line-names = "I2S_DP_LRCK",
763 anx7625_pins: anx7625-default-pins {
764 pins-out {
767 output-low;
770 pins-in {
772 input-enable;
773 bias-pull-up;
777 aud_clk_mosi_off_pins: aud-clk-mosi-off-pins {
778 pins-mosi-off {
784 aud_clk_mosi_on_pins: aud-clk-mosi-on-pins {
785 pins-mosi-on {
788 drive-strength = <10>;
792 aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
793 pins-miso-off {
798 aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
799 pins-miso-on {
804 aud_dat_miso_off_pins: aud-dat-miso-off-pins {
805 pins-miso-off {
811 aud_dat_miso_on_pins: aud-dat-miso-on-pins {
812 pins-miso-on {
815 drive-strength = <10>;
819 aud_dat_miso2_off_pins: aud-dat-miso2-off-pins {
820 pins-miso-off {
825 aud_dat_miso2_on_pins: aud-dat-miso2-on-pins {
826 pins-miso-on {
831 aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins {
832 pins-mosi-off {
837 aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins {
838 pins-mosi-on {
843 aud_dat_mosi_off_pins: aud-dat-mosi-off-pins {
844 pins-mosi-off {
850 aud_dat_mosi_on_pins: aud-dat-mosi-on-pins {
851 pins-mosi-on {
854 drive-strength = <10>;
858 aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins {
859 pins-i2s3-off {
866 aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins {
867 pins-i2s3-on {
874 aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins {
875 pins-i2s8-off {
883 aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins {
884 pins-i2s8-on {
892 aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins {
893 pins-i2s9-off {
898 aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins {
899 pins-i2s9-on {
904 aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins {
905 pins-tdm-off {
913 aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins {
914 pins-tdm-on {
922 aud_nle_mosi_off_pins: aud-nle-mosi-off-pins {
923 pins-nle-mosi-off {
929 aud_nle_mosi_on_pins: aud-nle-mosi-on-pins {
930 pins-nle-mosi-on {
936 cr50_int: cr50-irq-default-pins {
937 pins-gsc-ap-int-odl {
939 input-enable;
943 cros_ec_int: cros-ec-irq-default-pins {
944 pins-ec-ap-int-odl {
946 input-enable;
947 bias-pull-up;
951 i2c0_pins: i2c0-default-pins {
952 pins-bus {
955 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
956 drive-strength-microamp = <1000>;
960 i2c1_pins: i2c1-default-pins {
961 pins-bus {
964 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
965 drive-strength-microamp = <1000>;
969 i2c2_pins: i2c2-default-pins {
970 pins-bus {
973 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
977 i2c3_pins: i2c3-default-pins {
978 pins-bus {
981 bias-disable;
982 drive-strength-microamp = <1000>;
986 i2c7_pins: i2c7-default-pins {
987 pins-bus {
990 bias-disable;
991 drive-strength-microamp = <1000>;
995 mmc0_default_pins: mmc0-default-pins {
996 pins-cmd-dat {
1006 input-enable;
1007 drive-strength = <8>;
1008 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1011 pins-clk {
1013 drive-strength = <8>;
1014 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1017 pins-rst {
1019 drive-strength = <8>;
1020 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1024 mmc0_uhs_pins: mmc0-uhs-pins {
1025 pins-cmd-dat {
1035 input-enable;
1036 drive-strength = <10>;
1037 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1040 pins-clk {
1042 drive-strength = <10>;
1043 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1046 pins-rst {
1048 drive-strength = <8>;
1049 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1052 pins-ds {
1054 drive-strength = <10>;
1055 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1059 mmc1_default_pins: mmc1-default-pins {
1060 pins-cmd-dat {
1066 input-enable;
1067 drive-strength = <8>;
1068 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1071 pins-clk {
1073 drive-strength = <8>;
1074 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1077 pins-insert {
1079 input-enable;
1080 bias-pull-up;
1084 mmc1_uhs_pins: mmc1-uhs-pins {
1085 pins-cmd-dat {
1091 input-enable;
1092 drive-strength = <8>;
1093 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1096 pins-clk {
1098 input-enable;
1099 drive-strength = <8>;
1100 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1104 nor_flash_pins: nor-flash-default-pins {
1105 pins-cs-io1 {
1108 input-enable;
1109 bias-pull-up;
1110 drive-strength = <10>;
1113 pins-io0 {
1115 bias-pull-up;
1116 drive-strength = <10>;
1119 pins-clk {
1121 input-enable;
1122 bias-pull-up;
1123 drive-strength = <10>;
1127 pcie_pins: pcie-default-pins {
1128 pins-pcie-wake {
1130 bias-pull-up;
1133 pins-pcie-pereset {
1137 pins-pcie-clkreq {
1139 bias-pull-up;
1142 pins-wifi-kill {
1144 output-high;
1148 pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins {
1149 pins-en {
1151 output-low;
1155 pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins {
1156 pins-en {
1158 output-low;
1162 pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins {
1163 pins-en {
1165 output-low;
1169 pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins {
1170 pins-en {
1172 output-low;
1176 pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins {
1177 pins-en {
1179 output-low;
1183 pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins {
1184 pins-en {
1186 output-low;
1190 pp3300_wlan_pins: pp3300-wlan-pins {
1191 pins-pcie-en-pp3300-wlan {
1193 output-high;
1197 pwm0_pins: pwm0-default-pins {
1198 pins-pwm {
1202 pins-inhibit {
1204 output-high;
1208 rt1015p_pins: rt1015p-default-pins {
1211 output-low;
1215 scp_pins: scp-pins {
1216 pins-vreq-vao {
1221 spi1_pins: spi1-default-pins {
1222 pins-cs-mosi-clk {
1226 bias-disable;
1229 pins-miso {
1231 bias-pull-down;
1235 spi5_pins: spi5-default-pins {
1236 pins-bus {
1241 bias-disable;
1245 trackpad_pins: trackpad-default-pins {
1246 pins-int-n {
1248 input-enable;
1249 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
1253 touchscreen_pins: touchscreen-default-pins {
1254 pins-irq {
1256 input-enable;
1257 bias-pull-up;
1260 pins-reset {
1262 output-high;
1265 pins-report-sw {
1267 output-low;
1271 vow_clk_miso_off_pins: vow-clk-miso-off-pins {
1272 pins-miso-off {
1277 vow_clk_miso_on_pins: vow-clk-miso-on-pins {
1278 pins-miso-on {
1283 vow_dat_miso_off_pins: vow-dat-miso-off-pins {
1284 pins-miso-off {
1289 vow_dat_miso_on_pins: vow-dat-miso-on-pins {
1290 pins-miso-on {
1297 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
1303 pinctrl-names = "default";
1304 pinctrl-0 = <&pwm0_pins>;
1310 firmware-name = "mediatek/mt8192/scp.img";
1311 memory-region = <&scp_mem_reserved>;
1312 pinctrl-names = "default";
1313 pinctrl-0 = <&scp_pins>;
1315 cros-ec-rpmsg {
1316 compatible = "google,cros-ec-rpmsg";
1317 mediatek,rpmsg-name = "cros-ec-rpmsg";
1324 mediatek,pad-select = <0>;
1325 pinctrl-names = "default";
1326 pinctrl-0 = <&spi1_pins>;
1329 compatible = "google,cros-ec-spi";
1331 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
1332 spi-max-frequency = <3000000>;
1333 pinctrl-names = "default";
1334 pinctrl-0 = <&cros_ec_int>;
1336 #address-cells = <1>;
1337 #size-cells = <0>;
1339 base_detection: cbas {
1340 compatible = "google,cros-cbas";
1344 compatible = "google,cros-ec-pwm";
1345 #pwm-cells = <1>;
1350 i2c_tunnel: i2c-tunnel {
1351 compatible = "google,cros-ec-i2c-tunnel";
1352 google,remote-bus = <0>;
1353 #address-cells = <1>;
1354 #size-cells = <0>;
1358 compatible = "google,cros-ec-regulator";
1360 regulator-min-microvolt = <1800000>;
1361 regulator-max-microvolt = <3300000>;
1365 compatible = "google,cros-ec-regulator";
1367 regulator-min-microvolt = <3300000>;
1368 regulator-max-microvolt = <3300000>;
1372 compatible = "google,cros-ec-typec";
1373 #address-cells = <1>;
1374 #size-cells = <0>;
1377 compatible = "usb-c-connector";
1380 power-role = "dual";
1381 data-role = "host";
1382 try-power-role = "source";
1386 compatible = "usb-c-connector";
1389 power-role = "dual";
1390 data-role = "host";
1391 try-power-role = "source";
1400 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
1401 mediatek,pad-select = <0>;
1402 pinctrl-names = "default";
1403 pinctrl-0 = <&spi5_pins>;
1408 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
1409 spi-max-frequency = <1000000>;
1410 pinctrl-names = "default";
1411 pinctrl-0 = <&cr50_int>;
1416 #address-cells = <2>;
1417 #size-cells = <0>;
1420 compatible = "mediatek,mt6315-regulator";
1425 regulator-compatible = "vbuck1";
1426 regulator-name = "Vbcpu";
1427 regulator-min-microvolt = <300000>;
1428 regulator-max-microvolt = <1193750>;
1429 regulator-enable-ramp-delay = <256>;
1430 regulator-allowed-modes = <0 1 2>;
1431 regulator-always-on;
1435 regulator-compatible = "vbuck3";
1436 regulator-name = "Vlcpu";
1437 regulator-min-microvolt = <300000>;
1438 regulator-max-microvolt = <1193750>;
1439 regulator-enable-ramp-delay = <256>;
1440 regulator-allowed-modes = <0 1 2>;
1441 regulator-always-on;
1447 compatible = "mediatek,mt6315-regulator";
1452 regulator-compatible = "vbuck1";
1453 regulator-name = "Vgpu";
1454 regulator-min-microvolt = <606250>;
1455 regulator-max-microvolt = <800000>;
1456 regulator-enable-ramp-delay = <256>;
1457 regulator-allowed-modes = <0 1 2>;
1458 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
1459 regulator-coupled-max-spread = <10000>;
1472 wakeup-source;
1473 vusb33-supply = <&pp3300_g>;
1474 vbus-supply = <&pp5000_a>;
1477 #include <arm/cros-ec-keyboard.dtsi>
1478 #include <arm/cros-ec-sbs.dtsi>