Lines Matching +full:ciu +full:- +full:sample
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
26 #address-cells = <2>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a53";
33 enable-method = "psci";
37 compatible = "arm,cortex-a53";
40 enable-method = "psci";
44 compatible = "arm,cortex-a53";
47 enable-method = "psci";
51 compatible = "arm,cortex-a53";
54 enable-method = "psci";
58 gic: interrupt-controller@f1001000 {
59 compatible = "arm,gic-400";
62 #address-cells = <0>;
63 #interrupt-cells = <3>;
64 interrupt-controller;
68 compatible = "arm,armv8-timer";
80 compatible = "simple-bus";
81 #address-cells = <1>;
82 #size-cells = <1>;
85 crg: clock-reset-controller@8a22000 {
86 compatible = "hisilicon,hi3798cv200-crg", "syscon", "simple-mfd";
88 #clock-cells = <1>;
89 #reset-cells = <2>;
91 gmacphyrst: reset-controller {
92 compatible = "ti,syscon-reset";
93 #reset-cells = <1>;
94 ti,reset-bits = <
101 sysctrl: system-controller@8000000 {
102 compatible = "hisilicon,hi3798cv200-sysctrl", "syscon";
104 #clock-cells = <1>;
105 #reset-cells = <2>;
108 perictrl: peripheral-controller@8a20000 {
109 compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
110 "simple-mfd";
112 #address-cells = <1>;
113 #size-cells = <1>;
117 compatible = "hisilicon,hi3798cv200-usb2-phy";
121 #address-cells = <1>;
122 #size-cells = <0>;
126 #phy-cells = <0>;
132 #phy-cells = <0>;
138 compatible = "hisilicon,hi3798cv200-usb2-phy";
142 #address-cells = <1>;
143 #size-cells = <0>;
147 #phy-cells = <0>;
153 compatible = "hisilicon,hi3798cv200-combphy";
155 #phy-cells = <1>;
158 assigned-clocks = <&crg HISTB_COMBPHY0_CLK>;
159 assigned-clock-rates = <100000000>;
160 hisilicon,fixed-mode = <PHY_TYPE_USB3>;
164 compatible = "hisilicon,hi3798cv200-combphy";
166 #phy-cells = <1>;
169 assigned-clocks = <&crg HISTB_COMBPHY1_CLK>;
170 assigned-clock-rates = <100000000>;
171 hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>;
176 compatible = "pinconf-single";
178 pinctrl-single,register-width = <32>;
179 pinctrl-single,function-mask = <7>;
180 pinctrl-single,gpio-range = <
210 range: gpio-range {
211 #pinctrl-single,gpio-range-cells = <3>;
220 clock-names = "uartclk", "apb_pclk";
229 clock-names = "uartclk", "apb_pclk";
234 compatible = "hisilicon,hix5hd2-i2c";
236 #address-cells = <1>;
237 #size-cells = <0>;
239 clock-frequency = <400000>;
245 compatible = "hisilicon,hix5hd2-i2c";
247 #address-cells = <1>;
248 #size-cells = <0>;
250 clock-frequency = <400000>;
256 compatible = "hisilicon,hix5hd2-i2c";
258 #address-cells = <1>;
259 #size-cells = <0>;
261 clock-frequency = <400000>;
267 compatible = "hisilicon,hix5hd2-i2c";
269 #address-cells = <1>;
270 #size-cells = <0>;
272 clock-frequency = <400000>;
278 compatible = "hisilicon,hix5hd2-i2c";
280 #address-cells = <1>;
281 #size-cells = <0>;
283 clock-frequency = <400000>;
292 num-cs = <1>;
293 cs-gpios = <&gpio7 1 0>;
295 clock-names = "sspclk", "apb_pclk";
296 #address-cells = <1>;
297 #size-cells = <0>;
302 compatible = "snps,dw-mshc";
307 clock-names = "biu", "ciu";
309 reset-names = "reset";
314 compatible = "hisilicon,hi3798cv200-dw-mshc";
321 clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
323 reset-names = "reset";
331 gpio-controller;
332 #gpio-cells = <2>;
333 interrupt-controller;
334 #interrupt-cells = <2>;
335 gpio-ranges = <&pmx0 0 0 8>;
337 clock-names = "apb_pclk";
345 gpio-controller;
346 #gpio-cells = <2>;
347 interrupt-controller;
348 #interrupt-cells = <2>;
349 gpio-ranges = <
357 clock-names = "apb_pclk";
365 gpio-controller;
366 #gpio-cells = <2>;
367 interrupt-controller;
368 #interrupt-cells = <2>;
369 gpio-ranges = <&pmx0 0 16 5 &pmx0 5 21 3>;
371 clock-names = "apb_pclk";
379 gpio-controller;
380 #gpio-cells = <2>;
381 interrupt-controller;
382 #interrupt-cells = <2>;
383 gpio-ranges = <
390 clock-names = "apb_pclk";
398 gpio-controller;
399 #gpio-cells = <2>;
400 interrupt-controller;
401 #interrupt-cells = <2>;
402 gpio-ranges = <&pmx0 0 30 4 &pmx0 4 34 3 &pmx0 7 37 1>;
404 clock-names = "apb_pclk";
412 gpio-controller;
413 #gpio-cells = <2>;
414 interrupt-controller;
415 #interrupt-cells = <2>;
417 clock-names = "apb_pclk";
425 gpio-controller;
426 #gpio-cells = <2>;
427 interrupt-controller;
428 #interrupt-cells = <2>;
429 gpio-ranges = <&pmx0 0 38 3 &pmx0 0 41 5>;
431 clock-names = "apb_pclk";
439 gpio-controller;
440 #gpio-cells = <2>;
441 interrupt-controller;
442 #interrupt-cells = <2>;
443 gpio-ranges = <&pmx0 0 46 8>;
445 clock-names = "apb_pclk";
453 gpio-controller;
454 #gpio-cells = <2>;
455 interrupt-controller;
456 #interrupt-cells = <2>;
457 gpio-ranges = <&pmx0 0 54 8>;
459 clock-names = "apb_pclk";
467 gpio-controller;
468 #gpio-cells = <2>;
469 interrupt-controller;
470 #interrupt-cells = <2>;
471 gpio-ranges = <&pmx0 0 64 7 &pmx0 71 1>;
473 clock-names = "apb_pclk";
481 gpio-controller;
482 #gpio-cells = <2>;
483 interrupt-controller;
484 #interrupt-cells = <2>;
485 gpio-ranges = <&pmx0 0 72 6 &pmx0 6 78 1 &pmx0 7 79 1>;
487 clock-names = "apb_pclk";
495 gpio-controller;
496 #gpio-cells = <2>;
497 interrupt-controller;
498 #interrupt-cells = <2>;
499 gpio-ranges = <&pmx0 0 80 6 &pmx0 6 70 2>;
501 clock-names = "apb_pclk";
509 gpio-controller;
510 #gpio-cells = <2>;
511 interrupt-controller;
512 #interrupt-cells = <2>;
513 gpio-ranges = <&pmx0 0 88 8>;
515 clock-names = "apb_pclk";
520 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
526 clock-names = "mac_core", "mac_ifc";
530 reset-names = "mac_core", "mac_ifc", "phy";
535 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
541 clock-names = "mac_core", "mac_ifc";
545 reset-names = "mac_core", "mac_ifc", "phy";
550 compatible = "hisilicon,hix5hd2-ir";
558 compatible = "hisilicon,hi3798cv200-pcie";
562 reg-names = "control", "rc-dbi", "config";
563 #address-cells = <3>;
564 #size-cells = <2>;
566 bus-range = <0x00 0xff>;
567 num-lanes = <1>;
571 interrupt-names = "msi";
572 #interrupt-cells = <1>;
573 interrupt-map-mask = <0 0 0 0>;
574 interrupt-map = <0 0 0 0 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
579 clock-names = "aux", "pipe", "sys", "bus";
581 reset-names = "soft", "sys", "bus";
583 phy-names = "phy";
588 compatible = "generic-ohci";
594 clock-names = "bus", "clk12", "clk48";
596 reset-names = "bus";
598 phy-names = "usb";
603 compatible = "generic-ehci";
609 clock-names = "bus", "phy", "utmi";
613 reset-names = "bus", "phy", "utmi";
615 phy-names = "usb";