Lines Matching +full:lx2160a +full:- +full:fspi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-a72";
29 enable-method = "psci";
31 i-cache-size = <0xc000>;
32 i-cache-line-size = <64>;
33 i-cache-sets = <256>;
34 d-cache-size = <0x8000>;
35 d-cache-line-size = <64>;
36 d-cache-sets = <256>;
37 next-level-cache = <&l2>;
38 cpu-idle-states = <&CPU_PW20>;
39 #cooling-cells = <2>;
44 compatible = "arm,cortex-a72";
46 enable-method = "psci";
48 i-cache-size = <0xc000>;
49 i-cache-line-size = <64>;
50 i-cache-sets = <256>;
51 d-cache-size = <0x8000>;
52 d-cache-line-size = <64>;
53 d-cache-sets = <256>;
54 next-level-cache = <&l2>;
55 cpu-idle-states = <&CPU_PW20>;
56 #cooling-cells = <2>;
59 l2: l2-cache {
61 cache-level = <2>;
62 cache-unified;
63 cache-size = <0x100000>;
64 cache-line-size = <64>;
65 cache-sets = <1024>;
69 idle-states {
71 * PSCI node is not added default, U-boot will add missing
74 entry-method = "psci";
76 CPU_PW20: cpu-pw20 {
77 compatible = "arm,idle-state";
78 idle-state-name = "PW20";
79 arm,psci-suspend-param = <0x0>;
80 entry-latency-us = <2000>;
81 exit-latency-us = <2000>;
82 min-residency-us = <6000>;
86 rtc_clk: rtc-clk {
87 compatible = "fixed-clock";
88 #clock-cells = <0>;
89 clock-frequency = <32768>;
90 clock-output-names = "rtc_clk";
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 clock-frequency = <100000000>;
97 clock-output-names = "sysclk";
100 osc_27m: clock-osc-27m {
101 compatible = "fixed-clock";
102 #clock-cells = <0>;
103 clock-frequency = <27000000>;
104 clock-output-names = "phy_27m";
109 compatible = "linaro,optee-tz";
116 compatible = "syscon-reboot";
123 compatible = "arm,armv8-timer";
135 compatible = "arm,cortex-a72-pmu";
139 gic: interrupt-controller@6000000 {
140 compatible = "arm,gic-v3";
141 #address-cells = <2>;
142 #size-cells = <2>;
146 #interrupt-cells = <3>;
147 interrupt-controller;
150 its: msi-controller@6020000 {
151 compatible = "arm,gic-v3-its";
152 msi-controller;
157 thermal-zones {
158 ddr-controller {
159 polling-delay-passive = <1000>;
160 polling-delay = <5000>;
161 thermal-sensors = <&tmu 0>;
164 ddr-ctrler-alert {
170 ddr-ctrler-crit {
178 core-cluster {
179 polling-delay-passive = <1000>;
180 polling-delay = <5000>;
181 thermal-sensors = <&tmu 1>;
184 core_cluster_alert: core-cluster-alert {
190 core_cluster_crit: core-cluster-crit {
197 cooling-maps {
200 cooling-device =
209 compatible = "simple-bus";
210 #address-cells = <2>;
211 #size-cells = <2>;
214 ddr: memory-controller@1080000 {
215 compatible = "fsl,qoriq-memory-controller";
218 little-endian;
222 #address-cells = <1>;
223 #size-cells = <1>;
224 compatible = "fsl,ls1028a-dcfg", "syscon", "simple-mfd";
227 little-endian;
229 fspi_clk: clock-controller@900 {
230 compatible = "fsl,ls1028a-flexspi-clk";
232 #clock-cells = <0>;
234 clock-output-names = "fspi_clk";
241 little-endian;
245 compatible = "fsl,ls1028a-sfp";
249 clock-names = "sfp";
250 #address-cells = <1>;
251 #size-cells = <1>;
253 ls1028a_uid: unique-id@1c {
259 compatible = "fsl,ls1028a-scfg", "syscon";
261 big-endian;
264 clockgen: clock-controller@1300000 {
265 compatible = "fsl,ls1028a-clockgen";
267 #clock-cells = <2>;
272 compatible = "fsl,vf610-i2c";
273 #address-cells = <1>;
274 #size-cells = <0>;
283 compatible = "fsl,vf610-i2c";
284 #address-cells = <1>;
285 #size-cells = <0>;
294 compatible = "fsl,vf610-i2c";
295 #address-cells = <1>;
296 #size-cells = <0>;
305 compatible = "fsl,vf610-i2c";
306 #address-cells = <1>;
307 #size-cells = <0>;
316 compatible = "fsl,vf610-i2c";
317 #address-cells = <1>;
318 #size-cells = <0>;
327 compatible = "fsl,vf610-i2c";
328 #address-cells = <1>;
329 #size-cells = <0>;
338 compatible = "fsl,vf610-i2c";
339 #address-cells = <1>;
340 #size-cells = <0>;
349 compatible = "fsl,vf610-i2c";
350 #address-cells = <1>;
351 #size-cells = <0>;
359 fspi: spi@20c0000 {
360 compatible = "nxp,lx2160a-fspi";
361 #address-cells = <1>;
362 #size-cells = <0>;
365 reg-names = "fspi_base", "fspi_mmap";
368 clock-names = "fspi_en", "fspi";
373 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
374 #address-cells = <1>;
375 #size-cells = <0>;
378 clock-names = "dspi";
382 dma-names = "tx", "rx";
383 spi-num-chipselects = <4>;
384 little-endian;
389 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
390 #address-cells = <1>;
391 #size-cells = <0>;
394 clock-names = "dspi";
398 dma-names = "tx", "rx";
399 spi-num-chipselects = <4>;
400 little-endian;
405 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
406 #address-cells = <1>;
407 #size-cells = <0>;
410 clock-names = "dspi";
414 dma-names = "tx", "rx";
415 spi-num-chipselects = <3>;
416 little-endian;
421 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
424 clock-frequency = <0>; /* fixed up by bootloader */
426 voltage-ranges = <1800 1800 3300 3300>;
427 sdhci,auto-cmd12;
428 little-endian;
429 bus-width = <4>;
434 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
437 clock-frequency = <0>; /* fixed up by bootloader */
439 voltage-ranges = <1800 1800>;
440 sdhci,auto-cmd12;
441 non-removable;
442 little-endian;
443 bus-width = <4>;
448 compatible = "fsl,lx2160ar1-flexcan";
455 clock-names = "ipg", "per";
460 compatible = "fsl,lx2160ar1-flexcan";
467 clock-names = "ipg", "per";
491 compatible = "fsl,ls1028a-lpuart";
496 clock-names = "ipg";
497 dma-names = "rx","tx";
504 compatible = "fsl,ls1028a-lpuart";
509 clock-names = "ipg";
510 dma-names = "rx","tx";
517 compatible = "fsl,ls1028a-lpuart";
522 clock-names = "ipg";
523 dma-names = "rx","tx";
530 compatible = "fsl,ls1028a-lpuart";
535 clock-names = "ipg";
536 dma-names = "rx","tx";
543 compatible = "fsl,ls1028a-lpuart";
548 clock-names = "ipg";
549 dma-names = "rx","tx";
556 compatible = "fsl,ls1028a-lpuart";
561 clock-names = "ipg";
562 dma-names = "rx","tx";
568 edma0: dma-controller@22c0000 {
569 #dma-cells = <2>;
570 compatible = "fsl,ls1028a-edma", "fsl,vf610-edma";
576 interrupt-names = "edma-tx", "edma-err";
577 dma-channels = <32>;
578 clock-names = "dmamux0", "dmamux1";
586 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
589 gpio-controller;
590 #gpio-cells = <2>;
591 interrupt-controller;
592 #interrupt-cells = <2>;
593 little-endian;
597 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
600 gpio-controller;
601 #gpio-cells = <2>;
602 interrupt-controller;
603 #interrupt-cells = <2>;
604 little-endian;
608 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
611 gpio-controller;
612 #gpio-cells = <2>;
613 interrupt-controller;
614 #interrupt-cells = <2>;
615 little-endian;
619 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
623 snps,quirk-frame-length-adjustment = <0x20>;
624 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
629 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
633 snps,quirk-frame-length-adjustment = <0x20>;
634 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
639 compatible = "fsl,ls1028a-ahci";
642 reg-names = "ahci", "sata-ecc";
650 compatible = "fsl,ls1028a-pcie";
653 reg-names = "regs", "config";
656 interrupt-names = "pme", "aer";
657 #address-cells = <3>;
658 #size-cells = <2>;
660 dma-coherent;
661 num-viewport = <8>;
662 bus-range = <0x0 0xff>;
664 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
665 msi-parent = <&its>;
666 #interrupt-cells = <1>;
667 interrupt-map-mask = <0 0 0 7>;
668 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
672 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
676 pcie_ep1: pcie-ep@3400000 {
677 compatible = "fsl,ls1028a-pcie-ep","fsl,ls-pcie-ep";
680 reg-names = "regs", "addr_space";
682 interrupt-names = "pme";
683 num-ib-windows = <6>;
684 num-ob-windows = <8>;
689 compatible = "fsl,ls1028a-pcie";
692 reg-names = "regs", "config";
695 interrupt-names = "pme", "aer";
696 #address-cells = <3>;
697 #size-cells = <2>;
699 dma-coherent;
700 num-viewport = <8>;
701 bus-range = <0x0 0xff>;
703 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
704 msi-parent = <&its>;
705 #interrupt-cells = <1>;
706 interrupt-map-mask = <0 0 0 7>;
707 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
711 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
715 pcie_ep2: pcie-ep@3500000 {
716 compatible = "fsl,ls1028a-pcie-ep","fsl,ls-pcie-ep";
719 reg-names = "regs", "addr_space";
721 interrupt-names = "pme";
722 num-ib-windows = <6>;
723 num-ob-windows = <8>;
728 compatible = "arm,mmu-500";
730 #global-interrupts = <8>;
731 #iommu-cells = <1>;
732 dma-coherent;
733 stream-match-mask = <0x7c00>;
738 /* global non-secure fault */
740 /* combined non-secure interrupt */
742 /* performance counter interrupts 0-7 */
781 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
782 fsl,sec-era = <10>;
783 #address-cells = <1>;
784 #size-cells = <1>;
788 dma-coherent;
791 compatible = "fsl,sec-v5.0-job-ring",
792 "fsl,sec-v4.0-job-ring";
798 compatible = "fsl,sec-v5.0-job-ring",
799 "fsl,sec-v4.0-job-ring";
805 compatible = "fsl,sec-v5.0-job-ring",
806 "fsl,sec-v4.0-job-ring";
812 compatible = "fsl,sec-v5.0-job-ring",
813 "fsl,sec-v4.0-job-ring";
819 qdma: dma-controller@8380000 {
820 compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
829 interrupt-names = "qdma-error", "qdma-queue0",
830 "qdma-queue1", "qdma-queue2", "qdma-queue3";
831 dma-channels = <8>;
832 block-number = <1>;
833 block-offset = <0x10000>;
834 fsl,dma-queues = <2>;
835 status-sizes = <64>;
836 queue-sizes = <64 64>;
846 clock-names = "wdog_clk", "apb_pclk";
856 clock-names = "wdog_clk", "apb_pclk";
860 compatible = "arm,mali-dp500";
864 interrupt-names = "DE", "SE";
869 clock-names = "pxlclk", "mclk", "aclk", "pclk";
870 arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
871 arm,malidp-arqos-value = <0xd000d000>;
887 clock-names = "core", "shader", "bus";
888 #cooling-cells = <2>;
891 sai1: audio-controller@f100000 {
892 #sound-dai-cells = <0>;
893 compatible = "fsl,vf610-sai";
904 clock-names = "bus", "mclk1", "mclk2", "mclk3";
905 dma-names = "tx", "rx";
908 fsl,sai-asynchronous;
912 sai2: audio-controller@f110000 {
913 #sound-dai-cells = <0>;
914 compatible = "fsl,vf610-sai";
925 clock-names = "bus", "mclk1", "mclk2", "mclk3";
926 dma-names = "tx", "rx";
929 fsl,sai-asynchronous;
933 sai3: audio-controller@f120000 {
934 #sound-dai-cells = <0>;
935 compatible = "fsl,vf610-sai";
946 clock-names = "bus", "mclk1", "mclk2", "mclk3";
947 dma-names = "tx", "rx";
950 fsl,sai-asynchronous;
954 sai4: audio-controller@f130000 {
955 #sound-dai-cells = <0>;
956 compatible = "fsl,vf610-sai";
967 clock-names = "bus", "mclk1", "mclk2", "mclk3";
968 dma-names = "tx", "rx";
971 fsl,sai-asynchronous;
975 sai5: audio-controller@f140000 {
976 #sound-dai-cells = <0>;
977 compatible = "fsl,vf610-sai";
988 clock-names = "bus", "mclk1", "mclk2", "mclk3";
989 dma-names = "tx", "rx";
992 fsl,sai-asynchronous;
996 sai6: audio-controller@f150000 {
997 #sound-dai-cells = <0>;
998 compatible = "fsl,vf610-sai";
1009 clock-names = "bus", "mclk1", "mclk2", "mclk3";
1010 dma-names = "tx", "rx";
1013 fsl,sai-asynchronous;
1017 dpclk: clock-controller@f1f0000 {
1018 compatible = "fsl,ls1028a-plldig";
1020 #clock-cells = <0>;
1025 compatible = "fsl,qoriq-tmu";
1028 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
1029 fsl,tmu-calibration =
1073 little-endian;
1074 #thermal-sensor-cells = <1>;
1078 compatible = "pci-host-ecam-generic";
1080 #address-cells = <3>;
1081 #size-cells = <2>;
1082 msi-parent = <&its>;
1084 bus-range = <0x0 0x0>;
1085 dma-coherent;
1086 msi-map = <0 &its 0x17 0xe>;
1087 iommu-map = <0 &smmu 0x17 0xe>;
1088 /* PF0-6 BAR0 - non-prefetchable memory */
1090 /* PF0-6 BAR2 - prefetchable memory */
1092 /* PF0: VF0-1 BAR0 - non-prefetchable memory */
1094 /* PF0: VF0-1 BAR2 - prefetchable memory */
1096 /* PF1: VF0-1 BAR0 - non-prefetchable memory */
1098 /* PF1: VF0-1 BAR2 - prefetchable memory */
1100 /* BAR4 (PF5) - non-prefetchable memory */
1118 phy-mode = "internal";
1121 fixed-link {
1123 full-duplex;
1129 compatible = "fsl,enetc-mdio";
1131 #address-cells = <1>;
1132 #size-cells = <0>;
1136 compatible = "fsl,enetc-ptp";
1139 little-endian;
1140 fsl,extts-fifo;
1143 mscc_felix: ethernet-switch@0,5 {
1150 #address-cells = <1>;
1151 #size-cells = <0>;
1177 phy-mode = "internal";
1181 fixed-link {
1183 full-duplex;
1190 phy-mode = "internal";
1194 fixed-link {
1196 full-duplex;
1206 phy-mode = "internal";
1209 fixed-link {
1211 full-duplex;
1225 compatible = "fsl,ls1028a-enetc-ierb";
1230 compatible = "fsl,vf610-ftm-pwm";
1231 #pwm-cells = <3>;
1233 clock-names = "ftm_sys", "ftm_ext",
1241 compatible = "fsl,vf610-ftm-pwm";
1242 #pwm-cells = <3>;
1244 clock-names = "ftm_sys", "ftm_ext",
1252 compatible = "fsl,vf610-ftm-pwm";
1253 #pwm-cells = <3>;
1255 clock-names = "ftm_sys", "ftm_ext",
1263 compatible = "fsl,vf610-ftm-pwm";
1264 #pwm-cells = <3>;
1266 clock-names = "ftm_sys", "ftm_ext",
1274 compatible = "fsl,vf610-ftm-pwm";
1275 #pwm-cells = <3>;
1277 clock-names = "ftm_sys", "ftm_ext",
1285 compatible = "fsl,vf610-ftm-pwm";
1286 #pwm-cells = <3>;
1288 clock-names = "ftm_sys", "ftm_ext",
1296 compatible = "fsl,vf610-ftm-pwm";
1297 #pwm-cells = <3>;
1299 clock-names = "ftm_sys", "ftm_ext",
1307 compatible = "fsl,vf610-ftm-pwm";
1308 #pwm-cells = <3>;
1310 clock-names = "ftm_sys", "ftm_ext",
1317 rcpm: power-controller@1e34040 {
1318 compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
1320 #fsl,rcpm-wakeup-cells = <7>;
1321 little-endian;
1325 compatible = "fsl,ls1028a-ftm-alarm";
1327 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1333 compatible = "fsl,ls1028a-ftm-alarm";
1335 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;