Lines Matching full:clkc

8 #include <dt-bindings/clock/gxbb-clkc.h>
25 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
38 				clocks = <&clkc CLKID_USB1>;
62 			clocks = <&clkc CLKID_ACODEC>;
73 			clocks = <&clkc CLKID_BLKMV>;
82 	clocks = <&clkc CLKID_AIU_GLUE>,
83 		 <&clkc CLKID_I2S_OUT>,
84 		 <&clkc CLKID_AOCLK_GATE>,
85 		 <&clkc CLKID_CTS_AMCLK>,
86 		 <&clkc CLKID_MIXER_IFACE>,
87 		 <&clkc CLKID_IEC958>,
88 		 <&clkc CLKID_IEC958_GATE>,
89 		 <&clkc CLKID_CTS_MCLK_I958>,
90 		 <&clkc CLKID_CTS_I958>;
108 		clocks = <&clkc CLKID_USB>;
119 		clocks = <&clkc CLKID_USB>;
128 	clocks = <&clkc CLKID_EFUSE>;
132 	clocks = <&clkc CLKID_ETH>,
133 		 <&clkc CLKID_FCLK_DIV2>,
134 		 <&clkc CLKID_MPLL2>,
135 		 <&clkc CLKID_FCLK_DIV2>;
310 	clocks = <&xtal>, <&clkc CLKID_CLK81>;
326 	clocks = <&clkc CLKID_HDMI_PCLK>,
327 		 <&clkc CLKID_CLK81>,
328 		 <&clkc CLKID_GCLK_VENCI_INT0>;
333 	clkc: clock-controller {  label
334 		compatible = "amlogic,gxl-clkc";
342 	clocks = <&clkc CLKID_RNG0>;
347 	clocks = <&clkc CLKID_I2C>;
351 	clocks = <&clkc CLKID_AO_I2C>;
355 	clocks = <&clkc CLKID_I2C>;
359 	clocks = <&clkc CLKID_I2C>;
781 		clocks = <&clkc CLKID_FCLK_DIV4>;
822 	clocks = <&clkc CLKID_VPU>,
823 	         <&clkc CLKID_VAPB>;
831 	assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
832 			  <&clkc CLKID_VPU_0>,
833 			  <&clkc CLKID_VPU>, /* Glitch free mux */
834 			  <&clkc CLKID_VAPB_0_SEL>,
835 			  <&clkc CLKID_VAPB_0>,
836 			  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
837 	assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
839 				 <&clkc CLKID_VPU_0>,
840 				 <&clkc CLKID_FCLK_DIV4>,
842 				 <&clkc CLKID_VAPB_0>;
854 		 <&clkc CLKID_SAR_ADC>,
855 		 <&clkc CLKID_SAR_ADC_CLK>,
856 		 <&clkc CLKID_SAR_ADC_SEL>;
861 	clocks = <&clkc CLKID_SD_EMMC_A>,
862 		 <&clkc CLKID_SD_EMMC_A_CLK0>,
863 		 <&clkc CLKID_FCLK_DIV2>;
869 	clocks = <&clkc CLKID_SD_EMMC_B>,
870 		 <&clkc CLKID_SD_EMMC_B_CLK0>,
871 		 <&clkc CLKID_FCLK_DIV2>;
877 	clocks = <&clkc CLKID_SD_EMMC_C>,
878 		 <&clkc CLKID_SD_EMMC_C_CLK0>,
879 		 <&clkc CLKID_FCLK_DIV2>;
885 	clocks = <&clkc CLKID_HDMI_PCLK>,
886 		 <&clkc CLKID_CLK81>,
887 		 <&clkc CLKID_GCLK_VENCI_INT0>;
891 	clocks = <&clkc CLKID_SPICC>;
898 	clocks = <&clkc CLKID_SPI>;
902 	clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
917 	clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
922 	clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
933 	clocks = <&clkc CLKID_DOS_PARSER>,
934 		 <&clkc CLKID_DOS>,
935 		 <&clkc CLKID_VDEC_1>,
936 		 <&clkc CLKID_VDEC_HEVC>;