Lines Matching full:clkc

7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
119 		clocks = <&clkc CLKID_EFUSE>;
193 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
219 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
237 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
250 				clocks = <&clkc CLKID_USB1>;
277 			clocks = <&clkc CLKID_ETH>,
278 				 <&clkc CLKID_FCLK_DIV2>,
279 				 <&clkc CLKID_MPLL2>,
280 				 <&clkc CLKID_FCLK_DIV2>;
320 				clocks = <&clkc CLKID_RNG0>;
1240 				clkc: clock-controller {
1241 					compatible = "amlogic,axg-clkc";
1258 					clocks = <&clkc CLKID_VPU>,
1259 						 <&clkc CLKID_VAPB>;
1267 					assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1268 							  <&clkc CLKID_VPU_0>,
1269 							  <&clkc CLKID_VPU>, /* Glitch free mux */
1270 							  <&clkc CLKID_VAPB_0_SEL>,
1271 							  <&clkc CLKID_VAPB_0>,
1272 							  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1273 					assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
1275 								 <&clkc CLKID_VPU_0>,
1276 								 <&clkc CLKID_FCLK_DIV4>,
1278 								 <&clkc CLKID_VAPB_0>;
1307 			clocks = <&clkc CLKID_MIPI_DSI_PHY>;
1325 				compatible = "amlogic,axg-audio-clkc";
1329 				clocks = <&clkc CLKID_AUDIO>,
1330 					 <&clkc CLKID_MPLL0>,
1331 					 <&clkc CLKID_MPLL1>,
1332 					 <&clkc CLKID_MPLL2>,
1333 					 <&clkc CLKID_MPLL3>,
1334 					 <&clkc CLKID_HIFI_PLL>,
1335 					 <&clkc CLKID_FCLK_DIV3>,
1336 					 <&clkc CLKID_FCLK_DIV4>,
1337 					 <&clkc CLKID_GP0_PLL>;
1567 					clocks = <&xtal>, <&clkc CLKID_CLK81>;
1716 				clocks = <&clkc CLKID_AO_I2C>;
1755 			clocks = <&clkc CLKID_VAPB>;
1818 				clocks = <&clkc CLKID_SPICC0>;
1829 				clocks = <&clkc CLKID_SPICC1>;
1845 				clocks = <&clkc CLKID_I2C>;
1855 				clocks = <&clkc CLKID_I2C>;
1865 				clocks = <&clkc CLKID_I2C>;
1875 				clocks = <&clkc CLKID_I2C>;
1886 				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
1895 				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
1913 				clocks = <&clkc CLKID_SD_EMMC_B>,
1914 					<&clkc CLKID_SD_EMMC_B_CLK0>,
1915 					<&clkc CLKID_FCLK_DIV2>;
1925 				clocks = <&clkc CLKID_SD_EMMC_C>,
1926 					<&clkc CLKID_SD_EMMC_C_CLK0>,
1927 					<&clkc CLKID_FCLK_DIV2>;
1942 				clocks = <&clkc CLKID_SD_EMMC_C>,
1943 					 <&clkc CLKID_FCLK_DIV2>;
1951 				clocks = <&clkc CLKID_USB>;