Lines Matching +full:mali +full:- +full:400
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
26 simplefb_lcd: framebuffer-lcd {
27 compatible = "allwinner,simple-framebuffer",
28 "simple-framebuffer";
29 allwinner,pipeline = "mixer0-lcd0";
35 simplefb_hdmi: framebuffer-hdmi {
36 compatible = "allwinner,simple-framebuffer",
37 "simple-framebuffer";
38 allwinner,pipeline = "mixer1-lcd1-hdmi";
46 #address-cells = <1>;
47 #size-cells = <0>;
50 compatible = "arm,cortex-a53";
53 enable-method = "psci";
54 next-level-cache = <&L2>;
56 clock-names = "cpu";
57 #cooling-cells = <2>;
61 compatible = "arm,cortex-a53";
64 enable-method = "psci";
65 next-level-cache = <&L2>;
67 clock-names = "cpu";
68 #cooling-cells = <2>;
72 compatible = "arm,cortex-a53";
75 enable-method = "psci";
76 next-level-cache = <&L2>;
78 clock-names = "cpu";
79 #cooling-cells = <2>;
83 compatible = "arm,cortex-a53";
86 enable-method = "psci";
87 next-level-cache = <&L2>;
89 clock-names = "cpu";
90 #cooling-cells = <2>;
93 L2: l2-cache {
95 cache-level = <2>;
96 cache-unified;
100 de: display-engine {
101 compatible = "allwinner,sun50i-a64-display-engine";
107 gpu_opp_table: opp-table-gpu {
108 compatible = "operating-points-v2";
110 opp-120000000 {
111 opp-hz = /bits/ 64 <120000000>;
114 opp-312000000 {
115 opp-hz = /bits/ 64 <312000000>;
118 opp-432000000 {
119 opp-hz = /bits/ 64 <432000000>;
124 #clock-cells = <0>;
125 compatible = "fixed-clock";
126 clock-frequency = <24000000>;
127 clock-output-names = "osc24M";
131 #clock-cells = <0>;
132 compatible = "fixed-clock";
133 clock-frequency = <32768>;
134 clock-output-names = "ext-osc32k";
138 compatible = "arm,cortex-a53-pmu";
143 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
147 compatible = "arm,psci-0.2";
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "simple-audio-card";
155 simple-audio-card,name = "sun50i-a64-audio";
156 simple-audio-card,aux-devs = <&codec_analog>;
157 simple-audio-card,routing =
164 simple-audio-card,dai-link@0 {
166 frame-master = <&link0_cpu>;
167 bitclock-master = <&link0_cpu>;
168 mclk-fs = <128>;
171 sound-dai = <&dai>;
175 sound-dai = <&codec 0>;
181 compatible = "arm,armv8-timer";
182 allwinner,erratum-unknown1;
183 arm,no-tick-in-suspend;
194 thermal-zones {
195 cpu_thermal: cpu0-thermal {
197 polling-delay-passive = <0>;
198 polling-delay = <0>;
199 thermal-sensors = <&ths 0>;
201 cooling-maps {
204 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
211 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
242 gpu0_thermal: gpu0-thermal {
244 polling-delay-passive = <0>;
245 polling-delay = <0>;
246 thermal-sensors = <&ths 1>;
249 gpu1_thermal: gpu1-thermal {
251 polling-delay-passive = <0>;
252 polling-delay = <0>;
253 thermal-sensors = <&ths 2>;
258 compatible = "simple-bus";
259 #address-cells = <1>;
260 #size-cells = <1>;
264 compatible = "allwinner,sun50i-a64-de2";
267 #address-cells = <1>;
268 #size-cells = <1>;
272 compatible = "allwinner,sun50i-a64-de2-clk";
276 clock-names = "bus",
279 #clock-cells = <1>;
280 #reset-cells = <1>;
284 compatible = "allwinner,sun50i-a64-de2-rotate",
285 "allwinner,sun8i-a83t-de2-rotate";
290 clock-names = "bus",
296 compatible = "allwinner,sun50i-a64-de2-mixer-0";
300 clock-names = "bus",
305 #address-cells = <1>;
306 #size-cells = <0>;
309 #address-cells = <1>;
310 #size-cells = <0>;
315 remote-endpoint = <&tcon0_in_mixer0>;
320 remote-endpoint = <&tcon1_in_mixer0>;
327 compatible = "allwinner,sun50i-a64-de2-mixer-1";
331 clock-names = "bus",
336 #address-cells = <1>;
337 #size-cells = <0>;
340 #address-cells = <1>;
341 #size-cells = <0>;
346 remote-endpoint = <&tcon0_in_mixer1>;
351 remote-endpoint = <&tcon1_in_mixer1>;
359 compatible = "allwinner,sun50i-a64-system-control";
361 #address-cells = <1>;
362 #size-cells = <1>;
366 compatible = "mmio-sram";
368 #address-cells = <1>;
369 #size-cells = <1>;
372 de2_sram: sram-section@0 {
373 compatible = "allwinner,sun50i-a64-sram-c";
379 compatible = "mmio-sram";
381 #address-cells = <1>;
382 #size-cells = <1>;
385 ve_sram: sram-section@0 {
386 compatible = "allwinner,sun50i-a64-sram-c1",
387 "allwinner,sun4i-a10-sram-c1";
393 dma: dma-controller@1c02000 {
394 compatible = "allwinner,sun50i-a64-dma";
398 dma-channels = <8>;
399 dma-requests = <27>;
401 #dma-cells = <1>;
404 tcon0: lcd-controller@1c0c000 {
405 compatible = "allwinner,sun50i-a64-tcon-lcd",
406 "allwinner,sun8i-a83t-tcon-lcd";
410 clock-names = "ahb", "tcon-ch0";
411 clock-output-names = "tcon-data-clock";
412 #clock-cells = <0>;
414 reset-names = "lcd", "lvds";
417 #address-cells = <1>;
418 #size-cells = <0>;
421 #address-cells = <1>;
422 #size-cells = <0>;
427 remote-endpoint = <&mixer0_out_tcon0>;
432 remote-endpoint = <&mixer1_out_tcon0>;
437 #address-cells = <1>;
438 #size-cells = <0>;
443 remote-endpoint = <&dsi_in_tcon0>;
444 allwinner,tcon-channel = <1>;
450 tcon1: lcd-controller@1c0d000 {
451 compatible = "allwinner,sun50i-a64-tcon-tv",
452 "allwinner,sun8i-a83t-tcon-tv";
456 clock-names = "ahb", "tcon-ch1";
458 reset-names = "lcd";
461 #address-cells = <1>;
462 #size-cells = <0>;
465 #address-cells = <1>;
466 #size-cells = <0>;
471 remote-endpoint = <&mixer0_out_tcon1>;
476 remote-endpoint = <&mixer1_out_tcon1>;
481 #address-cells = <1>;
482 #size-cells = <0>;
487 remote-endpoint = <&hdmi_in_tcon1>;
493 video-codec@1c0e000 {
494 compatible = "allwinner,sun50i-a64-video-engine";
498 clock-names = "ahb", "mod", "ram";
505 compatible = "allwinner,sun50i-a64-mmc";
508 clock-names = "ahb", "mmc";
510 reset-names = "ahb";
512 max-frequency = <150000000>;
514 #address-cells = <1>;
515 #size-cells = <0>;
519 compatible = "allwinner,sun50i-a64-mmc";
522 clock-names = "ahb", "mmc";
524 reset-names = "ahb";
526 max-frequency = <150000000>;
528 #address-cells = <1>;
529 #size-cells = <0>;
533 compatible = "allwinner,sun50i-a64-emmc";
536 clock-names = "ahb", "mmc";
538 reset-names = "ahb";
540 max-frequency = <150000000>;
542 #address-cells = <1>;
543 #size-cells = <0>;
547 compatible = "allwinner,sun50i-a64-sid";
549 #address-cells = <1>;
550 #size-cells = <1>;
552 ths_calibration: thermal-sensor-calibration@34 {
558 compatible = "allwinner,sun50i-a64-crypto";
562 clock-names = "bus", "mod";
567 compatible = "allwinner,sun50i-a64-msgbox",
568 "allwinner,sun6i-a31-msgbox";
573 #mbox-cells = <1>;
577 compatible = "allwinner,sun8i-a33-musb";
582 interrupt-names = "mc";
584 phy-names = "usb";
591 compatible = "allwinner,sun50i-a64-usb-phy";
595 reg-names = "phy_ctrl",
600 clock-names = "usb0_phy",
604 reset-names = "usb0_reset",
607 #phy-cells = <1>;
611 compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
620 phy-names = "usb";
625 compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
632 phy-names = "usb";
637 compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
646 phy-names = "usb";
651 compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
658 phy-names = "usb";
663 compatible = "allwinner,sun50i-a64-ccu";
666 clock-names = "hosc", "losc";
667 #clock-cells = <1>;
668 #reset-cells = <1>;
672 compatible = "allwinner,sun50i-a64-pinctrl";
674 interrupt-parent = <&r_intc>;
680 clock-names = "apb", "hosc", "losc";
681 gpio-controller;
682 #gpio-cells = <3>;
683 interrupt-controller;
684 #interrupt-cells = <3>;
686 /omit-if-no-ref/
687 aif2_pins: aif2-pins {
692 /omit-if-no-ref/
693 aif3_pins: aif3-pins {
698 csi_pins: csi-pins {
704 /omit-if-no-ref/
705 csi_mclk_pin: csi-mclk-pin {
710 i2c0_pins: i2c0-pins {
715 i2c1_pins: i2c1-pins {
720 i2c2_pins: i2c2-pins {
725 /omit-if-no-ref/
726 lcd_rgb666_pins: lcd-rgb666-pins {
735 mmc0_pins: mmc0-pins {
739 drive-strength = <30>;
740 bias-pull-up;
743 mmc1_pins: mmc1-pins {
747 drive-strength = <30>;
748 bias-pull-up;
751 mmc2_pins: mmc2-pins {
756 drive-strength = <30>;
757 bias-pull-up;
760 mmc2_ds_pin: mmc2-ds-pin {
763 drive-strength = <30>;
764 bias-pull-up;
767 pwm_pin: pwm-pin {
772 rmii_pins: rmii-pins {
776 drive-strength = <40>;
779 rgmii_pins: rgmii-pins {
784 drive-strength = <40>;
787 spdif_tx_pin: spdif-tx-pin {
792 spi0_pins: spi0-pins {
797 spi1_pins: spi1-pins {
802 uart0_pb_pins: uart0-pb-pins {
807 uart1_pins: uart1-pins {
812 uart1_rts_cts_pins: uart1-rts-cts-pins {
817 uart2_pins: uart2-pins {
822 uart3_pins: uart3-pins {
827 uart4_pins: uart4-pins {
832 uart4_rts_cts_pins: uart4-rts-cts-pins {
839 compatible = "allwinner,sun50i-a64-timer",
840 "allwinner,sun8i-a23-timer";
848 compatible = "allwinner,sun50i-a64-wdt",
849 "allwinner,sun6i-a31-wdt";
856 #sound-dai-cells = <0>;
857 compatible = "allwinner,sun50i-a64-spdif",
858 "allwinner,sun8i-h3-spdif";
863 clock-names = "apb", "spdif";
865 dma-names = "tx";
866 pinctrl-names = "default";
867 pinctrl-0 = <&spdif_tx_pin>;
872 compatible = "allwinner,sun50i-a64-lradc",
873 "allwinner,sun8i-a83t-r-lradc";
875 interrupt-parent = <&r_intc>;
881 #sound-dai-cells = <0>;
882 compatible = "allwinner,sun50i-a64-i2s",
883 "allwinner,sun8i-h3-i2s";
887 clock-names = "apb", "mod";
889 dma-names = "rx", "tx";
895 #sound-dai-cells = <0>;
896 compatible = "allwinner,sun50i-a64-i2s",
897 "allwinner,sun8i-h3-i2s";
901 clock-names = "apb", "mod";
903 dma-names = "rx", "tx";
909 #sound-dai-cells = <0>;
910 compatible = "allwinner,sun50i-a64-i2s",
911 "allwinner,sun8i-h3-i2s";
915 clock-names = "apb", "mod";
917 dma-names = "rx", "tx";
923 #sound-dai-cells = <0>;
924 compatible = "allwinner,sun50i-a64-codec-i2s";
928 clock-names = "apb", "mod";
931 dma-names = "rx", "tx";
936 #sound-dai-cells = <1>;
937 compatible = "allwinner,sun50i-a64-codec",
938 "allwinner,sun8i-a33-codec";
942 clock-names = "bus", "mod";
946 ths: thermal-sensor@1c25000 {
947 compatible = "allwinner,sun50i-a64-ths";
950 clock-names = "bus", "mod";
953 nvmem-cells = <&ths_calibration>;
954 nvmem-cell-names = "calibration";
955 #thermal-sensor-cells = <1>;
959 compatible = "snps,dw-apb-uart";
962 reg-shift = <2>;
963 reg-io-width = <4>;
970 compatible = "snps,dw-apb-uart";
973 reg-shift = <2>;
974 reg-io-width = <4>;
981 compatible = "snps,dw-apb-uart";
984 reg-shift = <2>;
985 reg-io-width = <4>;
992 compatible = "snps,dw-apb-uart";
995 reg-shift = <2>;
996 reg-io-width = <4>;
1003 compatible = "snps,dw-apb-uart";
1006 reg-shift = <2>;
1007 reg-io-width = <4>;
1014 compatible = "allwinner,sun6i-a31-i2c";
1019 pinctrl-names = "default";
1020 pinctrl-0 = <&i2c0_pins>;
1022 #address-cells = <1>;
1023 #size-cells = <0>;
1027 compatible = "allwinner,sun6i-a31-i2c";
1032 pinctrl-names = "default";
1033 pinctrl-0 = <&i2c1_pins>;
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1040 compatible = "allwinner,sun6i-a31-i2c";
1045 pinctrl-names = "default";
1046 pinctrl-0 = <&i2c2_pins>;
1048 #address-cells = <1>;
1049 #size-cells = <0>;
1053 compatible = "allwinner,sun8i-h3-spi";
1057 clock-names = "ahb", "mod";
1059 dma-names = "rx", "tx";
1060 pinctrl-names = "default";
1061 pinctrl-0 = <&spi0_pins>;
1064 num-cs = <1>;
1065 #address-cells = <1>;
1066 #size-cells = <0>;
1070 compatible = "allwinner,sun8i-h3-spi";
1074 clock-names = "ahb", "mod";
1076 dma-names = "rx", "tx";
1077 pinctrl-names = "default";
1078 pinctrl-0 = <&spi1_pins>;
1081 num-cs = <1>;
1082 #address-cells = <1>;
1083 #size-cells = <0>;
1087 compatible = "allwinner,sun50i-a64-emac";
1091 interrupt-names = "macirq";
1093 reset-names = "stmmaceth";
1095 clock-names = "stmmaceth";
1099 compatible = "snps,dwmac-mdio";
1100 #address-cells = <1>;
1101 #size-cells = <0>;
1105 mali: gpu@1c40000 { label
1106 compatible = "allwinner,sun50i-a64-mali", "arm,mali-400";
1115 interrupt-names = "gp",
1123 clock-names = "bus", "core";
1125 operating-points-v2 = <&gpu_opp_table>;
1128 gic: interrupt-controller@1c81000 {
1129 compatible = "arm,gic-400";
1135 interrupt-controller;
1136 #interrupt-cells = <3>;
1140 compatible = "allwinner,sun50i-a64-pwm",
1141 "allwinner,sun5i-a13-pwm";
1144 pinctrl-names = "default";
1145 pinctrl-0 = <&pwm_pin>;
1146 #pwm-cells = <3>;
1150 mbus: dram-controller@1c62000 {
1151 compatible = "allwinner,sun50i-a64-mbus";
1154 reg-names = "mbus", "dram";
1158 clock-names = "mbus", "dram", "bus";
1160 #address-cells = <1>;
1161 #size-cells = <1>;
1162 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
1163 #interconnect-cells = <1>;
1167 compatible = "allwinner,sun50i-a64-csi";
1173 clock-names = "bus", "mod", "ram";
1175 pinctrl-names = "default";
1176 pinctrl-0 = <&csi_pins>;
1181 compatible = "allwinner,sun50i-a64-mipi-dsi";
1187 phy-names = "dphy";
1189 #address-cells = <1>;
1190 #size-cells = <0>;
1194 remote-endpoint = <&tcon0_out_dsi>;
1199 dphy: d-phy@1ca1000 {
1200 compatible = "allwinner,sun50i-a64-mipi-dphy",
1201 "allwinner,sun6i-a31-mipi-dphy";
1206 clock-names = "bus", "mod";
1209 #phy-cells = <0>;
1213 compatible = "allwinner,sun50i-a64-deinterlace",
1214 "allwinner,sun8i-h3-deinterlace";
1219 clock-names = "bus", "mod", "ram";
1223 interconnect-names = "dma-mem";
1227 compatible = "allwinner,sun50i-a64-dw-hdmi",
1228 "allwinner,sun8i-a83t-dw-hdmi";
1230 reg-io-width = <1>;
1234 clock-names = "iahb", "isfr", "tmds", "cec";
1236 reset-names = "ctrl";
1238 phy-names = "phy";
1242 #address-cells = <1>;
1243 #size-cells = <0>;
1249 remote-endpoint = <&tcon1_out_hdmi>;
1259 hdmi_phy: hdmi-phy@1ef0000 {
1260 compatible = "allwinner,sun50i-a64-hdmi-phy";
1264 clock-names = "bus", "mod", "pll-0";
1266 reset-names = "phy";
1267 #phy-cells = <0>;
1271 compatible = "allwinner,sun50i-a64-rtc",
1272 "allwinner,sun8i-h3-rtc";
1274 interrupt-parent = <&r_intc>;
1277 clock-output-names = "osc32k", "osc32k-out", "iosc";
1279 #clock-cells = <1>;
1282 r_intc: interrupt-controller@1f00c00 {
1283 compatible = "allwinner,sun50i-a64-r-intc",
1284 "allwinner,sun6i-a31-r-intc";
1285 interrupt-controller;
1286 #interrupt-cells = <3>;
1292 compatible = "allwinner,sun50i-a64-r-ccu";
1296 clock-names = "hosc", "losc", "iosc", "pll-periph";
1297 #clock-cells = <1>;
1298 #reset-cells = <1>;
1301 codec_analog: codec-analog@1f015c0 {
1302 compatible = "allwinner,sun50i-a64-codec-analog";
1308 compatible = "allwinner,sun50i-a64-i2c",
1309 "allwinner,sun6i-a31-i2c";
1315 #address-cells = <1>;
1316 #size-cells = <0>;
1320 compatible = "allwinner,sun50i-a64-ir",
1321 "allwinner,sun6i-a31-ir";
1324 clock-names = "apb", "ir";
1327 pinctrl-names = "default";
1328 pinctrl-0 = <&r_ir_rx_pin>;
1333 compatible = "allwinner,sun50i-a64-pwm",
1334 "allwinner,sun5i-a13-pwm";
1337 pinctrl-names = "default";
1338 pinctrl-0 = <&r_pwm_pin>;
1339 #pwm-cells = <3>;
1344 compatible = "allwinner,sun50i-a64-r-pinctrl";
1346 interrupt-parent = <&r_intc>;
1349 clock-names = "apb", "hosc", "losc";
1350 gpio-controller;
1351 #gpio-cells = <3>;
1352 interrupt-controller;
1353 #interrupt-cells = <3>;
1355 r_i2c_pl89_pins: r-i2c-pl89-pins {
1360 r_ir_rx_pin: r-ir-rx-pin {
1365 r_pwm_pin: r-pwm-pin {
1370 r_rsb_pins: r-rsb-pins {
1377 compatible = "allwinner,sun8i-a23-rsb";
1381 clock-frequency = <3000000>;
1383 pinctrl-names = "default";
1384 pinctrl-0 = <&r_rsb_pins>;
1386 #address-cells = <1>;
1387 #size-cells = <0>;