Lines Matching +full:mdio +full:- +full:gpio0
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
28 stdout-path = "serial0:115200n8";
31 gpio-keys {
32 compatible = "gpio-keys";
34 switch-14 {
36 gpios = <&gpio0 12 0>;
38 wakeup-source;
41 switch-13 {
43 gpios = <&gpio0 14 0>;
45 wakeup-source;
51 compatible = "gpio-leds";
53 led-ds23 {
55 gpios = <&gpio0 10 0>;
56 linux,default-trigger = "heartbeat";
61 compatible = "usb-nop-xceiv";
62 #phy-cells = <0>;
68 compatible = "mmio-sram";
70 #address-cells = <1>;
71 #size-cells = <1>;
73 ocm-sram@0 {
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_can0_default>;
86 ps-clk-frequency = <33333333>;
91 phy-mode = "rgmii-id";
92 phy-handle = <ðernet_phy>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_gem0_default>;
96 ethernet_phy: ethernet-phy@7 {
98 device_type = "ethernet-phy";
102 &gpio0 {
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_gpio0_default>;
109 clock-frequency = <400000>;
110 pinctrl-names = "default", "gpio";
111 pinctrl-0 = <&pinctrl_i2c0_default>;
112 pinctrl-1 = <&pinctrl_i2c0_gpio>;
113 scl-gpios = <&gpio0 50 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
114 sda-gpios = <&gpio0 51 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
116 i2c-mux@74 {
118 #address-cells = <1>;
119 #size-cells = <0>;
123 #address-cells = <1>;
124 #size-cells = <0>;
126 si570: clock-generator@5d {
127 #clock-cells = <0>;
129 temperature-stability = <50>;
131 factory-fout = <156250000>;
132 clock-frequency = <148500000>;
137 #address-cells = <1>;
138 #size-cells = <0>;
140 adv7511: hdmi-tx@39 {
143 adi,input-depth = <8>;
144 adi,input-colorspace = "yuv422";
145 adi,input-clock = "1x";
146 adi,input-style = <3>;
147 adi,input-justification = "right";
152 #address-cells = <1>;
153 #size-cells = <0>;
162 #address-cells = <1>;
163 #size-cells = <0>;
168 gpio-controller;
169 #gpio-cells = <2>;
174 #address-cells = <1>;
175 #size-cells = <0>;
184 #address-cells = <1>;
185 #size-cells = <0>;
204 pinctrl_can0_default: can0-default {
212 slew-rate = <0>;
213 io-standard = <1>;
216 conf-rx {
218 bias-high-impedance;
221 conf-tx {
223 bias-disable;
227 pinctrl_gem0_default: gem0-default {
235 slew-rate = <0>;
236 io-standard = <4>;
239 conf-rx {
241 bias-high-impedance;
242 low-power-disable;
245 conf-tx {
247 bias-disable;
248 low-power-enable;
251 mux-mdio {
256 conf-mdio {
258 slew-rate = <0>;
259 io-standard = <1>;
260 bias-disable;
264 pinctrl_gpio0_default: gpio0-default {
266 function = "gpio0";
276 slew-rate = <0>;
277 io-standard = <1>;
280 conf-pull-up {
282 bias-pull-up;
285 conf-pull-none {
287 bias-disable;
291 pinctrl_i2c0_default: i2c0-default {
299 bias-pull-up;
300 slew-rate = <0>;
301 io-standard = <1>;
305 pinctrl_i2c0_gpio: i2c0-gpio {
308 function = "gpio0";
313 slew-rate = <0>;
314 io-standard = <1>;
318 pinctrl_sdhci0_default: sdhci0-default {
326 slew-rate = <0>;
327 io-standard = <1>;
328 bias-disable;
331 mux-cd {
336 conf-cd {
338 bias-high-impedance;
339 bias-pull-up;
340 slew-rate = <0>;
341 io-standard = <1>;
344 mux-wp {
349 conf-wp {
351 bias-high-impedance;
352 bias-pull-up;
353 slew-rate = <0>;
354 io-standard = <1>;
358 pinctrl_uart1_default: uart1-default {
366 slew-rate = <0>;
367 io-standard = <1>;
370 conf-rx {
372 bias-high-impedance;
375 conf-tx {
377 bias-disable;
381 pinctrl_usb0_default: usb0-default {
389 slew-rate = <0>;
390 io-standard = <1>;
393 conf-rx {
395 bias-high-impedance;
398 conf-tx {
401 bias-disable;
408 pinctrl-names = "default";
409 pinctrl-0 = <&pinctrl_sdhci0_default>;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_uart1_default>;
421 usb-phy = <&usb_phy0>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&pinctrl_usb0_default>;