Lines Matching +full:0 +full:xff500000
62 #size-cells = <0>;
69 reg = <0x500>;
80 reg = <0x501>;
91 reg = <0x502>;
102 reg = <0x503>;
112 cpu_opp_table: opp-table-0 {
172 * The rk3288 cannot use the memory area above 0xfe000000
182 reg = <0x0 0xfe000000 0x0 0x1000000>;
190 #clock-cells = <0>;
206 reg = <0x0 0xff810000 0x0 0x20>;
223 fifo-depth = <0x100>;
225 reg = <0x0 0xff0c0000 0x0 0x4000>;
237 fifo-depth = <0x100>;
239 reg = <0x0 0xff0d0000 0x0 0x4000>;
251 fifo-depth = <0x100>;
253 reg = <0x0 0xff0e0000 0x0 0x4000>;
265 fifo-depth = <0x100>;
267 reg = <0x0 0xff0f0000 0x0 0x4000>;
275 reg = <0x0 0xff100000 0x0 0x100>;
293 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
294 reg = <0x0 0xff110000 0x0 0x1000>;
296 #size-cells = <0>;
308 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
309 reg = <0x0 0xff120000 0x0 0x1000>;
311 #size-cells = <0>;
323 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
324 reg = <0x0 0xff130000 0x0 0x1000>;
326 #size-cells = <0>;
332 reg = <0x0 0xff140000 0x0 0x1000>;
335 #size-cells = <0>;
339 pinctrl-0 = <&i2c1_xfer>;
345 reg = <0x0 0xff150000 0x0 0x1000>;
348 #size-cells = <0>;
352 pinctrl-0 = <&i2c3_xfer>;
358 reg = <0x0 0xff160000 0x0 0x1000>;
361 #size-cells = <0>;
365 pinctrl-0 = <&i2c4_xfer>;
371 reg = <0x0 0xff170000 0x0 0x1000>;
374 #size-cells = <0>;
378 pinctrl-0 = <&i2c5_xfer>;
384 reg = <0x0 0xff180000 0x0 0x100>;
393 pinctrl-0 = <&uart0_xfer>;
399 reg = <0x0 0xff190000 0x0 0x100>;
408 pinctrl-0 = <&uart1_xfer>;
414 reg = <0x0 0xff690000 0x0 0x100>;
421 pinctrl-0 = <&uart2_xfer>;
427 reg = <0x0 0xff1b0000 0x0 0x100>;
436 pinctrl-0 = <&uart3_xfer>;
442 reg = <0x0 0xff1c0000 0x0 0x100>;
451 pinctrl-0 = <&uart4_xfer>;
457 reg = <0x0 0xff250000 0x0 0x4000>;
472 thermal-sensors = <&tsadc 0>;
550 reg = <0x0 0xff280000 0x0 0x100>;
557 pinctrl-0 = <&otp_pin>;
568 reg = <0x0 0xff290000 0x0 0x10000>;
588 reg = <0x0 0xff500000 0x0 0x100>;
599 reg = <0x0 0xff520000 0x0 0x100>;
610 reg = <0x0 0xff540000 0x0 0x40000>;
624 reg = <0x0 0xff580000 0x0 0x40000>;
639 reg = <0x0 0xff5c0000 0x0 0x100>;
647 reg = <0x0 0xff600000 0x0 0x4000>;
648 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
660 reg = <0x0 0xff650000 0x0 0x1000>;
663 #size-cells = <0>;
667 pinctrl-0 = <&i2c0_xfer>;
673 reg = <0x0 0xff660000 0x0 0x1000>;
676 #size-cells = <0>;
680 pinctrl-0 = <&i2c2_xfer>;
686 reg = <0x0 0xff680000 0x0 0x10>;
689 pinctrl-0 = <&pwm0_pin>;
696 reg = <0x0 0xff680010 0x0 0x10>;
699 pinctrl-0 = <&pwm1_pin>;
706 reg = <0x0 0xff680020 0x0 0x10>;
709 pinctrl-0 = <&pwm2_pin>;
716 reg = <0x0 0xff680030 0x0 0x10>;
719 pinctrl-0 = <&pwm3_pin>;
726 reg = <0x0 0xff700000 0x0 0x18000>;
729 ranges = <0 0x0 0xff700000 0x18000>;
730 smp-sram@0 {
732 reg = <0x00 0x10>;
738 reg = <0x0 0xff720000 0x0 0x1000>;
743 reg = <0x0 0xff730000 0x0 0x100>;
749 #size-cells = <0>;
813 #power-domain-cells = <0>;
827 #power-domain-cells = <0>;
840 #power-domain-cells = <0>;
852 #power-domain-cells = <0>;
858 offset = <0x94>;
868 reg = <0x0 0xff740000 0x0 0x1000>;
873 reg = <0x0 0xff760000 0x0 0x1000>;
893 reg = <0x0 0xff770000 0x0 0x1000>;
899 #phy-cells = <0>;
911 #size-cells = <0>;
915 #phy-cells = <0>;
916 reg = <0x320>;
919 #clock-cells = <0>;
925 #phy-cells = <0>;
926 reg = <0x334>;
929 #clock-cells = <0>;
935 #phy-cells = <0>;
936 reg = <0x348>;
939 #clock-cells = <0>;
948 reg = <0x0 0xff800000 0x0 0x100>;
956 reg = <0x0 0xff8b0000 0x0 0x10000>;
957 #sound-dai-cells = <0>;
964 pinctrl-0 = <&spdif_tx>;
971 reg = <0x0 0xff890000 0x0 0x10000>;
972 #sound-dai-cells = <0>;
976 dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>;
979 pinctrl-0 = <&i2s0_bus>;
987 reg = <0x0 0xff8a0000 0x0 0x4000>;
998 reg = <0x0 0xff900800 0x0 0x40>;
1002 #iommu-cells = <0>;
1008 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1012 #iommu-cells = <0>;
1019 reg = <0x0 0xff920000 0x0 0x180>;
1030 reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
1042 #size-cells = <0>;
1044 vopb_out_hdmi: endpoint@0 {
1045 reg = <0>;
1068 reg = <0x0 0xff930300 0x0 0x100>;
1073 #iommu-cells = <0>;
1079 reg = <0x0 0xff940000 0x0 0x19c>, <0x0 0xff941000 0x0 0x1000>;
1091 #size-cells = <0>;
1093 vopl_out_hdmi: endpoint@0 {
1094 reg = <0>;
1117 reg = <0x0 0xff940300 0x0 0x100>;
1122 #iommu-cells = <0>;
1128 reg = <0x0 0xff960000 0x0 0x4000>;
1138 #size-cells = <0>;
1140 mipi_in: port@0 {
1141 reg = <0>;
1143 #size-cells = <0>;
1145 mipi_in_vopb: endpoint@0 {
1146 reg = <0>;
1164 reg = <0x0 0xff96c000 0x0 0x4000>;
1168 pinctrl-0 = <&lcdc_ctl>;
1175 #size-cells = <0>;
1177 lvds_in: port@0 {
1178 reg = <0>;
1180 #size-cells = <0>;
1182 lvds_in_vopb: endpoint@0 {
1183 reg = <0>;
1201 reg = <0x0 0xff970000 0x0 0x4000>;
1215 #size-cells = <0>;
1217 edp_in: port@0 {
1218 reg = <0>;
1220 #size-cells = <0>;
1222 edp_in_vopb: endpoint@0 {
1223 reg = <0>;
1241 reg = <0x0 0xff980000 0x0 0x20000>;
1243 #sound-dai-cells = <0>;
1254 #size-cells = <0>;
1255 hdmi_in_vopb: endpoint@0 {
1256 reg = <0>;
1269 reg = <0x0 0xff9a0000 0x0 0x800>;
1281 reg = <0x0 0xff9a0800 0x0 0x100>;
1285 #iommu-cells = <0>;
1291 reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
1295 #iommu-cells = <0>;
1301 reg = <0x0 0xffa30000 0x0 0x10000>;
1340 reg = <0x0 0xffaa0000 0x0 0x20>;
1345 reg = <0x0 0xffaa0080 0x0 0x20>;
1350 reg = <0x0 0xffad0000 0x0 0x20>;
1355 reg = <0x0 0xffad0100 0x0 0x20>;
1360 reg = <0x0 0xffad0180 0x0 0x20>;
1365 reg = <0x0 0xffad0400 0x0 0x20>;
1370 reg = <0x0 0xffad0480 0x0 0x20>;
1375 reg = <0x0 0xffad0500 0x0 0x20>;
1380 reg = <0x0 0xffad0800 0x0 0x20>;
1385 reg = <0x0 0xffad0880 0x0 0x20>;
1390 reg = <0x0 0xffad0900 0x0 0x20>;
1395 reg = <0x0 0xffae0000 0x0 0x20>;
1400 reg = <0x0 0xffaf0000 0x0 0x20>;
1405 reg = <0x0 0xffaf0080 0x0 0x20>;
1410 reg = <0x0 0xffb20000 0x0 0x4000>;
1411 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
1422 reg = <0x0 0xffb40000 0x0 0x20>;
1429 reg = <0x07 0x10>;
1432 reg = <0x17 0x1>;
1440 #address-cells = <0>;
1442 reg = <0x0 0xffc01000 0x0 0x1000>,
1443 <0x0 0xffc02000 0x0 0x2000>,
1444 <0x0 0xffc04000 0x0 0x2000>,
1445 <0x0 0xffc06000 0x0 0x2000>;
1446 interrupts = <GIC_PPI 9 0xf04>;
1459 reg = <0x0 0xff750000 0x0 0x100>;
1472 reg = <0x0 0xff780000 0x0 0x100>;
1485 reg = <0x0 0xff790000 0x0 0x100>;
1498 reg = <0x0 0xff7a0000 0x0 0x100>;
1511 reg = <0x0 0xff7b0000 0x0 0x100>;
1524 reg = <0x0 0xff7c0000 0x0 0x100>;
1537 reg = <0x0 0xff7d0000 0x0 0x100>;
1550 reg = <0x0 0xff7e0000 0x0 0x100>;
1563 reg = <0x0 0xff7f0000 0x0 0x100>;
1617 rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>;
1621 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
1625 rockchip,pins = <0 RK_PA2 1 &pcfg_pull_up>;
1629 rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
1641 rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>,
1642 <0 RK_PC0 1 &pcfg_pull_none>;
1964 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
1968 rockchip,pins = <0 RK_PB2 1 &pcfg_pull_none>;