Lines Matching +full:0 +full:x80064000

32 		#size-cells = <0>;
34 		cpu@0 {
37 			reg = <0>;
45 		reg = <0x80000000 0x80000>;
52 			reg = <0x80000000 0x40000>;
59 				reg = <0x80000000 0x2000>;
64 				reg = <0x80004000 0x2000>;
65 				interrupts = <0>, <14>, <20>, <0>,
73 				reg = <0x80008000 0x2000>;
81 				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
93 				reg = <0x80010000 0x2000>;
102 				reg = <0x80014000 0x2000>;
108 				#size-cells = <0>;
110 				reg = <0x80018000 0x2000>;
112 				gpio0: gpio@0 {
114 					reg = <0>;
142 				duart_pins_a: duart@0 {
143 					reg = <0>;
153 				auart0_pins_a: auart0@0 {
154 					reg = <0>;
166 				auart0_2pins_a: auart0-2pins@0 {
167 					reg = <0>;
177 				auart1_2pins_a: auart1-2pins@0 {
178 					reg = <0>;
188 				gpmi_pins_a: gpmi-nand@0 {
189 					reg = <0>;
214 				gpmi_pins_fixup: gpmi-pins-fixup@0 {
215 					reg = <0>;
224 				mmc0_4bit_pins_a: mmc0-4bit@0 {
225 					reg = <0>;
239 				mmc0_8bit_pins_a: mmc0-8bit@0 {
240 					reg = <0>;
259 				mmc0_pins_fixup: mmc0-pins-fixup@0 {
260 					reg = <0>;
268 				mmc0_sck_cfg: mmc0-sck-cfg@0 {
269 					reg = <0>;
276 				mmc1_4bit_pins_a: mmc1-4bit@0 {
277 					reg = <0>;
291 				mmc1_8bit_pins_a: mmc1-8bit@0 {
292 					reg = <0>;
310 				pwm2_pins_a: pwm2@0 {
311 					reg = <0>;
320 				lcdif_24bit_pins_a: lcdif-24bit@0 {
321 					reg = <0>;
357 				spi2_pins_a: spi2@0 {
358 					reg = <0>;
370 				i2c_pins_a: i2c@0 {
371 					reg = <0>;
406 				reg = <0x8001c000 2000>;
411 				reg = <0x80020000 0x2000>;
417 				reg = <0x80024000 0x2000>;
419 					     <19>, <0>, <25>, <23>,
420 					     <60>, <58>, <9>, <0>,
421 					     <0>, <0>, <0>, <0>;
433 				reg = <0x80028000 0x2000>;
439 				reg = <0x8002a000 0x2000>;
447 				reg = <0x8002c000 0x2000>;
452 				reg = <0x8002e000 0x2000>;
458 				reg = <0x80030000 2000>;
465 				reg = <0x80034000 0x2000>;
474 				reg = <0x80038000 0x2000>;
483 			reg = <0x80040000 0x40000>;
488 				reg = <0x80040000 0x2000>;
493 				reg = <0x80042000 0x2000>;
500 				reg = <0x80044000 0x2000>;
505 				reg = <0x80046000 0x2000>;
512 				reg = <0x80048000 0x2000>;
519 				reg = <0x8004c000 0x2000>;
520 				dmas = <&dma_apbx 0>;
527 				reg = <0x80050000 0x2000>;
536 				reg = <0x80054000 2000>;
544 				#size-cells = <0>;
546 				reg = <0x80058000 0x2000>;
556 				reg = <0x8005c000 0x2000>;
562 				reg = <0x80064000 0x2000>;
571 				reg = <0x80068000 0x2000>;
578 				reg = <0x8006c000 0x2000>;
588 				reg = <0x8006e000 0x2000>;
598 				reg = <0x80070000 0x2000>;
599 				interrupts = <0>;
607 				reg = <0x8007c000 0x2000>;
618 		reg = <0x80080000 0x80000>;
623 			reg = <0x80080000 0x40000>;