Lines Matching +full:ssc +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
21 interrupt-parent = <&aic>;
42 #address-cells = <1>;
43 #size-cells = <0>;
46 compatible = "arm,arm926ej-s";
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
65 compatible = "fixed-clock";
66 #clock-cells = <0>;
67 clock-frequency = <0>;
71 compatible = "fixed-clock";
72 #clock-cells = <0>;
73 clock-frequency = <1000000>;
78 compatible = "mmio-sram";
80 #address-cells = <1>;
81 #size-cells = <1>;
86 compatible = "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <1>;
92 compatible = "atmel,at91sam9rl-lcdc";
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_fb>;
98 clock-names = "hclk", "lcdc_clk";
103 compatible = "atmel,at91sam9rl-ebi";
104 #address-cells = <2>;
105 #size-cells = <1>;
118 nand_controller: nand-controller {
119 compatible = "atmel,at91sam9g45-nand-controller";
120 #address-cells = <2>;
121 #size-cells = <1>;
128 compatible = "simple-bus";
129 #address-cells = <1>;
130 #size-cells = <1>;
134 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
135 #address-cells = <1>;
136 #size-cells = <0>;
142 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
149 #address-cells = <1>;
150 #size-cells = <0>;
151 pinctrl-names = "default";
153 clock-names = "mci_clk";
158 compatible = "atmel,at91sam9260-i2c";
161 #address-cells = <1>;
162 #size-cells = <0>;
168 compatible = "atmel,at91sam9260-i2c";
171 #address-cells = <1>;
172 #size-cells = <0>;
177 compatible = "atmel,at91sam9260-usart";
179 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
181 atmel,use-dma-rx;
182 atmel,use-dma-tx;
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_usart0>;
186 clock-names = "usart";
191 compatible = "atmel,at91sam9260-usart";
193 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
195 atmel,use-dma-rx;
196 atmel,use-dma-tx;
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_usart1>;
200 clock-names = "usart";
205 compatible = "atmel,at91sam9260-usart";
207 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
209 atmel,use-dma-rx;
210 atmel,use-dma-tx;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_usart2>;
214 clock-names = "usart";
219 compatible = "atmel,at91sam9260-usart";
221 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
223 atmel,use-dma-rx;
224 atmel,use-dma-tx;
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_usart3>;
228 clock-names = "usart";
232 ssc0: ssc@fffc0000 {
233 compatible = "atmel,at91sam9rl-ssc";
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
241 ssc1: ssc@fffc4000 {
242 compatible = "atmel,at91sam9rl-ssc";
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
251 compatible = "atmel,at91sam9rl-pwm";
254 #pwm-cells = <3>;
256 clock-names = "pwm_clk";
261 #address-cells = <1>;
262 #size-cells = <0>;
263 compatible = "atmel,at91rm9200-spi";
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_spi0>;
269 clock-names = "spi_clk";
274 compatible = "atmel,at91sam9rl-adc";
278 clock-names = "adc_clk", "adc_op_clk";
279 atmel,adc-use-external-triggers;
280 atmel,adc-channels-used = <0x3f>;
281 atmel,adc-vref = <3300>;
282 atmel,adc-startup-time = <40>;
286 compatible = "atmel,at91sam9rl-udc";
291 clock-names = "pclk", "hclk";
295 dma0: dma-controller@ffffe600 {
296 compatible = "atmel,at91sam9rl-dma";
299 #dma-cells = <2>;
301 clock-names = "dma_clk";
305 compatible = "atmel,at91sam9260-sdramc";
310 compatible = "atmel,at91sam9260-smc", "syscon";
315 compatible = "atmel,at91sam9rl-matrix", "syscon";
319 aic: interrupt-controller@fffff000 {
320 #interrupt-cells = <3>;
321 compatible = "atmel,at91rm9200-aic";
322 interrupt-controller;
324 atmel,external-irqs = <31>;
328 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
330 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
332 pinctrl-names = "default";
333 pinctrl-0 = <&pinctrl_dbgu>;
335 clock-names = "usart";
340 #address-cells = <1>;
341 #size-cells = <1>;
342 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
345 atmel,mux-mask =
354 pinctrl_adc0_ts: adc0_ts-0 {
362 pinctrl_adc0_ad0: adc0_ad0-0 {
366 pinctrl_adc0_ad1: adc0_ad1-0 {
370 pinctrl_adc0_ad2: adc0_ad2-0 {
374 pinctrl_adc0_ad3: adc0_ad3-0 {
378 pinctrl_adc0_ad4: adc0_ad4-0 {
382 pinctrl_adc0_ad5: adc0_ad5-0 {
386 pinctrl_adc0_adtrg: adc0_adtrg-0 {
392 pinctrl_dbgu: dbgu-0 {
400 pinctrl_ebi_addr_nand: ebi-addr-0 {
408 pinctrl_fb: fb-0 {
435 pinctrl_i2c_gpio0: i2c_gpio0-0 {
443 pinctrl_i2c_gpio1: i2c_gpio1-0 {
451 pinctrl_mmc0_clk: mmc0_clk-0 {
456 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
462 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
471 pinctrl_nand_rb: nand-rb-0 {
476 pinctrl_nand_cs: nand-cs-0 {
481 pinctrl_nand_oe_we: nand-oe-we-0 {
489 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
493 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
497 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
501 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
505 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
509 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
513 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
517 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
521 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
525 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
529 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
535 pinctrl_spi0: spi0-0 {
544 pinctrl_ssc0_tx: ssc0_tx-0 {
551 pinctrl_ssc0_rx: ssc0_rx-0 {
560 pinctrl_ssc1_tx: ssc1_tx-0 {
567 pinctrl_ssc1_rx: ssc1_rx-0 {
576 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
580 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
584 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
588 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
592 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
596 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
600 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
604 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
608 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
614 pinctrl_usart0: usart0-0 {
620 pinctrl_usart0_rts: usart0_rts-0 {
625 pinctrl_usart0_cts: usart0_cts-0 {
630 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
636 pinctrl_usart0_dcd: usart0_dcd-0 {
641 pinctrl_usart0_ri: usart0_ri-0 {
646 pinctrl_usart0_sck: usart0_sck-0 {
653 pinctrl_usart1: usart1-0 {
659 pinctrl_usart1_rts: usart1_rts-0 {
664 pinctrl_usart1_cts: usart1_cts-0 {
669 pinctrl_usart1_sck: usart1_sck-0 {
676 pinctrl_usart2: usart2-0 {
682 pinctrl_usart2_rts: usart2_rts-0 {
687 pinctrl_usart2_cts: usart2_cts-0 {
692 pinctrl_usart2_sck: usart2_sck-0 {
699 pinctrl_usart3: usart3-0 {
705 pinctrl_usart3_rts: usart3_rts-0 {
710 pinctrl_usart3_cts: usart3_cts-0 {
715 pinctrl_usart3_sck: usart3_sck-0 {
722 compatible = "atmel,at91rm9200-gpio";
725 #gpio-cells = <2>;
726 gpio-controller;
727 interrupt-controller;
728 #interrupt-cells = <2>;
733 compatible = "atmel,at91rm9200-gpio";
736 #gpio-cells = <2>;
737 gpio-controller;
738 interrupt-controller;
739 #interrupt-cells = <2>;
744 compatible = "atmel,at91rm9200-gpio";
747 #gpio-cells = <2>;
748 gpio-controller;
749 interrupt-controller;
750 #interrupt-cells = <2>;
755 compatible = "atmel,at91rm9200-gpio";
758 #gpio-cells = <2>;
759 gpio-controller;
760 interrupt-controller;
761 #interrupt-cells = <2>;
766 pmc: clock-controller@fffffc00 {
767 compatible = "atmel,at91sam9rl-pmc", "syscon";
770 #clock-cells = <2>;
772 clock-names = "slow_clk", "main_xtal";
775 reset-controller@fffffd00 {
776 compatible = "atmel,at91sam9260-rstc";
782 compatible = "atmel,at91sam9260-shdwc";
788 compatible = "atmel,at91sam9260-pit";
795 compatible = "atmel,at91sam9260-wdt";
802 clk32k: clock-controller@fffffd50 {
803 compatible = "atmel,at91sam9x5-sckc";
806 #clock-cells = <0>;
810 compatible = "atmel,at91sam9260-rtt";
818 compatible = "atmel,at91sam9260-gpbr", "syscon";
824 compatible = "atmel,at91rm9200-rtc";
834 i2c-gpio-0 {
835 compatible = "i2c-gpio";
838 i2c-gpio,sda-open-drain;
839 i2c-gpio,scl-open-drain;
840 i2c-gpio,delay-us = <2>; /* ~100 kHz */
841 #address-cells = <1>;
842 #size-cells = <0>;
843 pinctrl-names = "default";
844 pinctrl-0 = <&pinctrl_i2c_gpio0>;
848 i2c-gpio-1 {
849 compatible = "i2c-gpio";
852 i2c-gpio,sda-open-drain;
853 i2c-gpio,scl-open-drain;
854 i2c-gpio,delay-us = <2>; /* ~100 kHz */
855 #address-cells = <1>;
856 #size-cells = <0>;
857 pinctrl-names = "default";
858 pinctrl-0 = <&pinctrl_i2c_gpio1>;