Lines Matching +full:cpu +full:- +full:syscon
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu@0 {
20 compatible = "brcm,brahma-b15";
21 device_type = "cpu";
22 enable-method = "brcm,brahma-b15";
26 cpu@1 {
27 compatible = "brcm,brahma-b15";
28 device_type = "cpu";
29 enable-method = "brcm,brahma-b15";
33 cpu@2 {
34 compatible = "brcm,brahma-b15";
35 device_type = "cpu";
36 enable-method = "brcm,brahma-b15";
40 cpu@3 {
41 compatible = "brcm,brahma-b15";
42 device_type = "cpu";
43 enable-method = "brcm,brahma-b15";
48 gic: interrupt-controller@ffd00000 {
49 compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
54 interrupt-controller;
55 #interrupt-cells = <3>;
59 compatible = "arm,armv7-timer";
67 #address-cells = <1>;
68 #size-cells = <1>;
69 compatible = "simple-bus";
75 reg-shift = <2>;
76 reg-io-width = <4>;
78 clock-frequency = <81000000>;
81 sun_top_ctrl: syscon@404000 {
82 compatible = "brcm,bcm7445-sun-top-ctrl",
83 "syscon";
87 hif_cpubiuctrl: syscon@3e2400 {
88 compatible = "brcm,bcm7445-hif-cpubiuctrl",
89 "syscon";
93 hif_continuation: syscon@452000 {
94 compatible = "brcm,bcm7445-hif-continuation",
95 "syscon";
99 irq0_intc: interrupt-controller@40a780 {
100 compatible = "brcm,bcm7120-l2-intc";
101 interrupt-parent = <&gic>;
102 #interrupt-cells = <1>;
104 interrupt-controller;
107 brcm,int-map-mask = <0x25c>, <0x7000000>;
108 brcm,int-fwd-mask = <0x70000>;
111 irq0_aon_intc: interrupt-controller@417280 {
112 compatible = "brcm,bcm7120-l2-intc";
114 interrupt-parent = <&gic>;
115 #interrupt-cells = <1>;
116 interrupt-controller;
120 brcm,int-map-mask = <0x1e3 0x18000000 0x100000>;
121 brcm,int-fwd-mask = <0x0>;
122 brcm,irq-can-wake;
125 hif_intr2_intc: interrupt-controller@3e1000 {
126 compatible = "brcm,l2-intc";
128 interrupt-controller;
129 #interrupt-cells = <1>;
131 interrupt-parent = <&gic>;
132 interrupt-names = "hif";
135 aon_pm_l2_intc: interrupt-controller@410640 {
136 compatible = "brcm,l2-intc";
138 interrupt-controller;
139 #interrupt-cells = <1>;
141 interrupt-parent = <&gic>;
142 brcm,irq-can-wake;
145 aon-ctrl@410000 {
146 compatible = "brcm,brcmstb-aon-ctrl";
148 reg-names = "aon-ctrl", "aon-sram";
151 nand_controller: nand-controller@3e2800 {
153 #address-cells = <1>;
154 #size-cells = <0>;
155 compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";
156 reg-names = "nand", "flash-dma";
158 interrupt-parent = <&hif_intr2_intc>;
160 interrupt-names = "nand_ctlrdy", "flash_dma_done";
164 compatible = "brcm,bcm7445-ahci", "brcm,sata3-ahci";
165 reg-names = "ahci", "top-ctrl";
168 #address-cells = <1>;
169 #size-cells = <0>;
171 sata0: sata-port@0 {
176 sata1: sata-port@1 {
182 sata_phy: sata-phy@458100 {
183 compatible = "brcm,bcm7445-sata-phy", "brcm,phy-sata3";
185 reg-names = "phy";
186 #address-cells = <0x1>;
187 #size-cells = <0x0>;
189 sata_phy0: sata-phy@0 {
191 #phy-cells = <0>;
194 sata_phy1: sata-phy@1 {
196 #phy-cells = <0>;
201 compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
203 #gpio-cells = <2>;
204 #interrupt-cells = <2>;
205 gpio-controller;
206 interrupt-controller;
207 interrupt-parent = <&irq0_intc>;
209 brcm,gpio-bank-widths = <32 32 32 24>;
213 compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
215 #gpio-cells = <2>;
216 #interrupt-cells = <2>;
217 gpio-controller;
218 interrupt-controller;
219 interrupts-extended = <&irq0_aon_intc 0x6>,
221 wakeup-source;
222 brcm,gpio-bank-widths = <18 4>;
228 compatible = "simple-bus";
230 #address-cells = <1>;
231 #size-cells = <1>;
234 compatible = "brcm,brcmstb-memc", "simple-bus";
235 #address-cells = <1>;
236 #size-cells = <1>;
239 memc-ddr@2000 {
240 compatible = "brcm,brcmstb-memc-ddr";
244 ddr-phy@6000 {
245 compatible = "brcm,brcmstb-ddr-phy-v240.1";
250 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
256 compatible = "brcm,brcmstb-memc", "simple-bus";
257 #address-cells = <1>;
258 #size-cells = <1>;
261 memc-ddr@2000 {
262 compatible = "brcm,brcmstb-memc-ddr";
266 ddr-phy@6000 {
267 compatible = "brcm,brcmstb-ddr-phy-v240.1";
272 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
278 compatible = "brcm,brcmstb-memc", "simple-bus";
279 #address-cells = <1>;
280 #size-cells = <1>;
283 memc-ddr@2000 {
284 compatible = "brcm,brcmstb-memc-ddr";
288 ddr-phy@6000 {
289 compatible = "brcm,brcmstb-ddr-phy-v240.1";
294 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
301 compatible = "brcm,boot-sram", "mmio-sram";
306 compatible = "brcm,brcmstb-smpboot";
307 syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;
308 syscon-cont = <&hif_continuation>;
312 compatible = "brcm,brcmstb-reboot";
313 syscon = <&sun_top_ctrl 0x304 0x308>;