Lines Matching full:syscon
62 clocks = <&syscon ASPEED_CLK_AHB>;
93 clocks = <&syscon ASPEED_CLK_AHB>;
116 clocks = <&syscon ASPEED_CLK_AHB>;
153 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
161 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
169 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
179 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
190 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
202 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
223 syscon: syscon@1e6e2000 {
224 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
269 clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
270 resets = <&syscon ASPEED_RESET_HACE>;
274 compatible = "aspeed,ast2500-gfx", "syscon";
277 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
278 resets = <&syscon ASPEED_RESET_CRT1>;
279 syscon = <&syscon>;
287 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
288 resets = <&syscon ASPEED_RESET_XDMA>;
291 aspeed,scu = <&syscon>;
298 clocks = <&syscon ASPEED_CLK_APB>;
299 resets = <&syscon ASPEED_RESET_ADC>;
307 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
308 <&syscon ASPEED_CLK_GATE_ECLK>;
325 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
333 clocks = <&syscon ASPEED_CLK_SDIO>;
342 clocks = <&syscon ASPEED_CLK_SDIO>;
354 clocks = <&syscon ASPEED_CLK_APB>;
365 clocks = <&syscon ASPEED_CLK_APB>;
385 clocks = <&syscon ASPEED_CLK_APB>;
394 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
405 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
413 clocks = <&syscon ASPEED_CLK_APB>;
419 clocks = <&syscon ASPEED_CLK_APB>;
425 clocks = <&syscon ASPEED_CLK_APB>;
434 clocks = <&syscon ASPEED_CLK_24M>;
435 resets = <&syscon ASPEED_RESET_PWM>;
444 clocks = <&syscon ASPEED_CLK_APB>;
450 compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
462 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
470 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
478 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
486 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
493 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
501 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
527 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
536 clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
537 resets = <&syscon ASPEED_RESET_PECI>;
548 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
559 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
570 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
601 clocks = <&syscon ASPEED_CLK_APB>;
602 resets = <&syscon ASPEED_RESET_I2C>;
616 clocks = <&syscon ASPEED_CLK_APB>;
617 resets = <&syscon ASPEED_RESET_I2C>;
631 clocks = <&syscon ASPEED_CLK_APB>;
632 resets = <&syscon ASPEED_RESET_I2C>;
647 clocks = <&syscon ASPEED_CLK_APB>;
648 resets = <&syscon ASPEED_RESET_I2C>;
663 clocks = <&syscon ASPEED_CLK_APB>;
664 resets = <&syscon ASPEED_RESET_I2C>;
679 clocks = <&syscon ASPEED_CLK_APB>;
680 resets = <&syscon ASPEED_RESET_I2C>;
695 clocks = <&syscon ASPEED_CLK_APB>;
696 resets = <&syscon ASPEED_RESET_I2C>;
711 clocks = <&syscon ASPEED_CLK_APB>;
712 resets = <&syscon ASPEED_RESET_I2C>;
727 clocks = <&syscon ASPEED_CLK_APB>;
728 resets = <&syscon ASPEED_RESET_I2C>;
743 clocks = <&syscon ASPEED_CLK_APB>;
744 resets = <&syscon ASPEED_RESET_I2C>;
759 clocks = <&syscon ASPEED_CLK_APB>;
760 resets = <&syscon ASPEED_RESET_I2C>;
775 clocks = <&syscon ASPEED_CLK_APB>;
776 resets = <&syscon ASPEED_RESET_I2C>;
791 clocks = <&syscon ASPEED_CLK_APB>;
792 resets = <&syscon ASPEED_RESET_I2C>;
807 clocks = <&syscon ASPEED_CLK_APB>;
808 resets = <&syscon ASPEED_RESET_I2C>;