Lines Matching +full:0 +full:x7c00
28 reg = <0xc1100000 0x200000>;
31 ranges = <0x0 0xc1100000 0x200000>;
37 reg = <0x4000 0x400>;
44 reg = <0x5400 0x2ac>;
53 reg = <0x7c00 0x200>;
58 reg = <0x8100 0x8>;
63 reg = <0x84c0 0x18>;
71 reg = <0x84dc 0x18>;
78 reg = <0x8500 0x20>;
81 #size-cells = <0>;
87 reg = <0x8550 0x10>;
94 reg = <0x8650 0x10>;
101 reg = <0x8680 0x34>;
109 reg = <0x8700 0x18>;
116 reg = <0x87c0 0x20>;
119 #size-cells = <0>;
125 #phy-cells = <0>;
126 reg = <0x8800 0x20>;
132 #phy-cells = <0>;
133 reg = <0x8820 0x20>;
139 reg = <0x8c20 0x20>;
142 #size-cells = <0>;
148 reg = <0x8c80 0x80>;
150 #size-cells = <0>;
156 reg = <0x8e00 0x42>;
163 reg = <0x9880 0x10>;
172 reg = <0x9900 0x8>;
173 interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
178 reg = <0x9940 0x18>;
188 reg = <0xc4200000 0x1000>;
195 reg = <0xc4300000 0x10000>;
198 ranges = <0x0 0xc4300000 0x10000>;
202 reg = <0x1000 0x1000>,
203 <0x100 0x100>;
211 reg = <0xc8100000 0x100000>;
214 ranges = <0x0 0xc8100000 0x100000>;
218 reg = <0x1c 0x8>, <0x38 0x8>;
225 reg = <0x480 0x20>;
232 reg = <0x4c0 0x18>;
239 reg = <0x500 0x20>;
242 #size-cells = <0>;
248 reg = <0x740 0x14>;
259 #size-cells = <0>;
260 reg = <0xc9040000 0x40000>;
274 #size-cells = <0>;
275 reg = <0xc90c0000 0x40000>;
285 reg = <0xc9410000 0x10000
286 0xc1108108 0x4>;
294 reg = <0xd9000000 0x20000>;
297 ranges = <0 0xd9000000 0x20000>;
302 reg = <0xd9040000 0x10000>;
307 reg = <0xda000000 0x6000>;
310 ranges = <0x0 0xda000000 0x6000>;
312 efuse: nvmem@0 {
314 reg = <0x0 0x2000>;
323 #thermal-sensor-cells = <0>;
332 #clock-cells = <0>;