Lines Matching +full:mali +full:- +full:400
2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>
5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun6i-rtc.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
47 #include <dt-bindings/clock/sun8i-r40-ccu.h>
48 #include <dt-bindings/clock/sun8i-tcon-top.h>
49 #include <dt-bindings/reset/sun8i-r40-ccu.h>
50 #include <dt-bindings/reset/sun8i-de2.h>
51 #include <dt-bindings/thermal/thermal.h>
54 #address-cells = <1>;
55 #size-cells = <1>;
56 interrupt-parent = <&gic>;
59 #address-cells = <1>;
60 #size-cells = <1>;
64 #clock-cells = <0>;
65 compatible = "fixed-clock";
66 clock-frequency = <24000000>;
67 clock-accuracy = <50000>;
68 clock-output-names = "osc24M";
72 #clock-cells = <0>;
73 compatible = "fixed-clock";
74 clock-frequency = <32768>;
75 clock-accuracy = <20000>;
76 clock-output-names = "ext-osc32k";
81 #address-cells = <1>;
82 #size-cells = <0>;
85 compatible = "arm,cortex-a7";
89 clock-names = "cpu";
90 #cooling-cells = <2>;
94 compatible = "arm,cortex-a7";
98 clock-names = "cpu";
99 #cooling-cells = <2>;
103 compatible = "arm,cortex-a7";
107 clock-names = "cpu";
108 #cooling-cells = <2>;
112 compatible = "arm,cortex-a7";
116 clock-names = "cpu";
117 #cooling-cells = <2>;
121 de: display-engine {
122 compatible = "allwinner,sun8i-r40-display-engine";
127 thermal-zones {
128 cpu_thermal: cpu0-thermal {
130 polling-delay-passive = <0>;
131 polling-delay = <0>;
132 thermal-sensors = <&ths 0>;
135 cpu_hot_trip: cpu-hot {
141 cpu_very_hot_trip: cpu-very-hot {
148 cooling-maps {
149 cpu-hot-limit {
151 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
159 gpu_thermal: gpu-thermal {
161 polling-delay-passive = <0>;
162 polling-delay = <0>;
163 thermal-sensors = <&ths 1>;
168 compatible = "simple-bus";
169 #address-cells = <1>;
170 #size-cells = <1>;
174 compatible = "allwinner,sun8i-r40-de2-clk",
175 "allwinner,sun8i-h3-de2-clk";
179 clock-names = "bus",
182 #clock-cells = <1>;
183 #reset-cells = <1>;
187 compatible = "allwinner,sun8i-r40-de2-mixer-0";
191 clock-names = "bus",
196 #address-cells = <1>;
197 #size-cells = <0>;
202 remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
209 compatible = "allwinner,sun8i-r40-de2-mixer-1";
213 clock-names = "bus",
218 #address-cells = <1>;
219 #size-cells = <0>;
224 remote-endpoint = <&tcon_top_mixer1_in_mixer1>;
231 compatible = "allwinner,sun8i-r40-deinterlace",
232 "allwinner,sun8i-h3-deinterlace";
242 clock-names = "bus", "mod", "ram";
246 interconnect-names = "dma-mem";
249 syscon: system-control@1c00000 {
250 compatible = "allwinner,sun8i-r40-system-control",
251 "allwinner,sun4i-a10-system-control";
253 #address-cells = <1>;
254 #size-cells = <1>;
258 compatible = "mmio-sram";
260 #address-cells = <1>;
261 #size-cells = <1>;
264 ve_sram: sram-section@0 {
265 compatible = "allwinner,sun8i-r40-sram-c1",
266 "allwinner,sun4i-a10-sram-c1";
272 nmi_intc: interrupt-controller@1c00030 {
273 compatible = "allwinner,sun7i-a20-sc-nmi";
274 interrupt-controller;
275 #interrupt-cells = <2>;
280 dma: dma-controller@1c02000 {
281 compatible = "allwinner,sun8i-r40-dma",
282 "allwinner,sun50i-a64-dma";
286 dma-channels = <16>;
287 dma-requests = <31>;
289 #dma-cells = <1>;
293 compatible = "allwinner,sun8i-r40-spi",
294 "allwinner,sun8i-h3-spi";
298 clock-names = "ahb", "mod";
301 #address-cells = <1>;
302 #size-cells = <0>;
306 compatible = "allwinner,sun8i-r40-spi",
307 "allwinner,sun8i-h3-spi";
311 clock-names = "ahb", "mod";
314 #address-cells = <1>;
315 #size-cells = <0>;
319 compatible = "allwinner,sun8i-r40-csi0",
320 "allwinner,sun7i-a20-csi0";
325 clock-names = "bus", "isp", "ram";
328 interconnect-names = "dma-mem";
332 video-codec@1c0e000 {
333 compatible = "allwinner,sun8i-r40-video-engine";
337 clock-names = "ahb", "mod", "ram";
342 interconnect-names = "dma-mem";
346 compatible = "allwinner,sun8i-r40-mmc",
347 "allwinner,sun50i-a64-mmc";
350 clock-names = "ahb", "mmc";
352 reset-names = "ahb";
353 pinctrl-0 = <&mmc0_pins>;
354 pinctrl-names = "default";
357 #address-cells = <1>;
358 #size-cells = <0>;
362 compatible = "allwinner,sun8i-r40-mmc",
363 "allwinner,sun50i-a64-mmc";
366 clock-names = "ahb", "mmc";
368 reset-names = "ahb";
371 #address-cells = <1>;
372 #size-cells = <0>;
376 compatible = "allwinner,sun8i-r40-emmc",
377 "allwinner,sun50i-a64-emmc";
380 clock-names = "ahb", "mmc";
382 reset-names = "ahb";
383 pinctrl-0 = <&mmc2_pins>;
384 pinctrl-names = "default";
387 #address-cells = <1>;
388 #size-cells = <0>;
392 compatible = "allwinner,sun8i-r40-mmc",
393 "allwinner,sun50i-a64-mmc";
396 clock-names = "ahb", "mmc";
398 reset-names = "ahb";
399 pinctrl-0 = <&mmc3_pins>;
400 pinctrl-names = "default";
403 #address-cells = <1>;
404 #size-cells = <0>;
408 compatible = "allwinner,sun8i-r40-usb-phy";
413 reg-names = "phy_ctrl",
420 clock-names = "usb0_phy",
426 reset-names = "usb0_reset",
430 #phy-cells = <1>;
434 compatible = "allwinner,sun8i-r40-crypto";
438 clock-names = "bus", "mod";
443 compatible = "allwinner,sun8i-r40-spi",
444 "allwinner,sun8i-h3-spi";
448 clock-names = "ahb", "mod";
451 #address-cells = <1>;
452 #size-cells = <0>;
456 compatible = "allwinner,sun8i-r40-ahci";
461 reset-names = "ahci";
466 compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
472 phy-names = "usb";
477 compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
484 phy-names = "usb";
489 compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
495 phy-names = "usb";
500 compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
507 phy-names = "usb";
512 compatible = "allwinner,sun8i-r40-spi",
513 "allwinner,sun8i-h3-spi";
517 clock-names = "ahb", "mod";
520 #address-cells = <1>;
521 #size-cells = <0>;
525 compatible = "allwinner,sun8i-r40-ccu";
528 clock-names = "hosc", "losc";
529 #clock-cells = <1>;
530 #reset-cells = <1>;
534 compatible = "allwinner,sun8i-r40-rtc";
537 clock-output-names = "osc32k", "osc32k-out";
539 #clock-cells = <1>;
543 compatible = "allwinner,sun8i-r40-pinctrl";
548 clock-names = "apb", "hosc", "losc";
549 gpio-controller;
550 interrupt-controller;
551 #interrupt-cells = <3>;
552 #gpio-cells = <3>;
554 can_ph_pins: can-ph-pins {
559 can_pa_pins: can-pa-pins {
564 clk_out_a_pin: clk-out-a-pin {
569 /omit-if-no-ref/
570 csi0_8bits_pins: csi0-8bits-pins {
577 /omit-if-no-ref/
578 csi0_mclk_pin: csi0-mclk-pin {
583 gmac_rgmii_pins: gmac-rgmii-pins {
593 drive-strength = <40>;
596 i2c0_pins: i2c0-pins {
601 i2c1_pins: i2c1-pins {
606 i2c2_pins: i2c2-pins {
611 i2c3_pins: i2c3-pins {
616 i2c4_pins: i2c4-pins {
621 ir0_pins: ir0-pins {
626 ir1_pins: ir1-pins {
631 mmc0_pins: mmc0-pins {
635 drive-strength = <30>;
636 bias-pull-up;
639 mmc1_pg_pins: mmc1-pg-pins {
643 drive-strength = <30>;
644 bias-pull-up;
647 mmc2_pins: mmc2-pins {
652 drive-strength = <30>;
653 bias-pull-up;
656 /omit-if-no-ref/
657 mmc3_pins: mmc3-pins {
661 drive-strength = <30>;
662 bias-pull-up;
665 /omit-if-no-ref/
666 spi0_pc_pins: spi0-pc-pins {
671 /omit-if-no-ref/
672 spi0_cs0_pc_pin: spi0-cs0-pc-pin {
677 /omit-if-no-ref/
678 spi1_pi_pins: spi1-pi-pins {
683 /omit-if-no-ref/
684 spi1_cs0_pi_pin: spi1-cs0-pi-pin {
689 /omit-if-no-ref/
690 spi1_cs1_pi_pin: spi1-cs1-pi-pin {
695 /omit-if-no-ref/
696 uart0_pb_pins: uart0-pb-pins {
701 /omit-if-no-ref/
702 uart2_pi_pins: uart2-pi-pins {
707 /omit-if-no-ref/
708 uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{
713 /omit-if-no-ref/
714 uart3_pg_pins: uart3-pg-pins {
719 /omit-if-no-ref/
720 uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
725 /omit-if-no-ref/
726 uart4_pg_pins: uart4-pg-pins {
731 /omit-if-no-ref/
732 uart5_ph_pins: uart5-ph-pins {
737 /omit-if-no-ref/
738 uart7_pi_pins: uart7-pi-pins {
745 compatible = "allwinner,sun4i-a10-timer";
757 compatible = "allwinner,sun4i-a10-wdt";
764 compatible = "allwinner,sun8i-r40-ir",
765 "allwinner,sun6i-a31-ir";
767 pinctrl-0 = <&ir0_pins>;
768 pinctrl-names = "default";
770 clock-names = "apb", "ir";
777 compatible = "allwinner,sun8i-r40-ir",
778 "allwinner,sun6i-a31-ir";
780 pinctrl-0 = <&ir1_pins>;
781 pinctrl-names = "default";
783 clock-names = "apb", "ir";
790 #sound-dai-cells = <0>;
791 compatible = "allwinner,sun8i-r40-i2s",
792 "allwinner,sun8i-h3-i2s";
796 clock-names = "apb", "mod";
799 dma-names = "rx", "tx";
803 #sound-dai-cells = <0>;
804 compatible = "allwinner,sun8i-r40-i2s",
805 "allwinner,sun8i-h3-i2s";
809 clock-names = "apb", "mod";
812 dma-names = "rx", "tx";
816 #sound-dai-cells = <0>;
817 compatible = "allwinner,sun8i-r40-i2s",
818 "allwinner,sun8i-h3-i2s";
822 clock-names = "apb", "mod";
825 dma-names = "rx", "tx";
828 ths: thermal-sensor@1c24c00 {
829 compatible = "allwinner,sun8i-r40-ths";
832 clock-names = "bus", "mod";
835 /* TODO: add nvmem-cells for calibration */
836 #thermal-sensor-cells = <1>;
840 compatible = "snps,dw-apb-uart";
843 reg-shift = <2>;
844 reg-io-width = <4>;
851 compatible = "snps,dw-apb-uart";
854 reg-shift = <2>;
855 reg-io-width = <4>;
862 compatible = "snps,dw-apb-uart";
865 reg-shift = <2>;
866 reg-io-width = <4>;
873 compatible = "snps,dw-apb-uart";
876 reg-shift = <2>;
877 reg-io-width = <4>;
884 compatible = "snps,dw-apb-uart";
887 reg-shift = <2>;
888 reg-io-width = <4>;
895 compatible = "snps,dw-apb-uart";
898 reg-shift = <2>;
899 reg-io-width = <4>;
906 compatible = "snps,dw-apb-uart";
909 reg-shift = <2>;
910 reg-io-width = <4>;
917 compatible = "snps,dw-apb-uart";
920 reg-shift = <2>;
921 reg-io-width = <4>;
928 compatible = "allwinner,sun6i-a31-i2c";
933 pinctrl-0 = <&i2c0_pins>;
934 pinctrl-names = "default";
936 #address-cells = <1>;
937 #size-cells = <0>;
941 compatible = "allwinner,sun6i-a31-i2c";
946 pinctrl-0 = <&i2c1_pins>;
947 pinctrl-names = "default";
949 #address-cells = <1>;
950 #size-cells = <0>;
954 compatible = "allwinner,sun6i-a31-i2c";
959 pinctrl-0 = <&i2c2_pins>;
960 pinctrl-names = "default";
962 #address-cells = <1>;
963 #size-cells = <0>;
967 compatible = "allwinner,sun6i-a31-i2c";
972 pinctrl-0 = <&i2c3_pins>;
973 pinctrl-names = "default";
975 #address-cells = <1>;
976 #size-cells = <0>;
980 compatible = "allwinner,sun8i-r40-can";
989 compatible = "allwinner,sun6i-a31-i2c";
994 pinctrl-0 = <&i2c4_pins>;
995 pinctrl-names = "default";
997 #address-cells = <1>;
998 #size-cells = <0>;
1001 mali: gpu@1c40000 {
1002 compatible = "allwinner,sun8i-r40-mali", "arm,mali-400";
1011 interrupt-names = "gp",
1019 clock-names = "bus", "core";
1024 compatible = "allwinner,sun8i-r40-gmac";
1028 interrupt-names = "macirq";
1030 reset-names = "stmmaceth";
1032 clock-names = "stmmaceth";
1036 compatible = "snps,dwmac-mdio";
1037 #address-cells = <1>;
1038 #size-cells = <0>;
1042 mbus: dram-controller@1c62000 {
1043 compatible = "allwinner,sun8i-r40-mbus";
1046 #address-cells = <1>;
1047 #size-cells = <1>;
1048 dma-ranges = <0x00000000 0x40000000 0x80000000>;
1049 #interconnect-cells = <1>;
1052 tcon_top: tcon-top@1c70000 {
1053 compatible = "allwinner,sun8i-r40-tcon-top";
1061 clock-names = "bus",
1062 "tcon-tv0",
1064 "tcon-tv1",
1067 clock-output-names = "tcon-top-tv0",
1068 "tcon-top-tv1",
1069 "tcon-top-dsi";
1071 #clock-cells = <1>;
1074 #address-cells = <1>;
1075 #size-cells = <0>;
1081 remote-endpoint = <&mixer0_out_tcon_top>;
1086 #address-cells = <1>;
1087 #size-cells = <0>;
1100 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
1105 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>;
1110 #address-cells = <1>;
1111 #size-cells = <0>;
1116 remote-endpoint = <&mixer1_out_tcon_top>;
1121 #address-cells = <1>;
1122 #size-cells = <0>;
1135 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
1140 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>;
1145 #address-cells = <1>;
1146 #size-cells = <0>;
1151 remote-endpoint = <&tcon_tv0_out_tcon_top>;
1156 remote-endpoint = <&tcon_tv1_out_tcon_top>;
1164 remote-endpoint = <&hdmi_in_tcon_top>;
1170 tcon_tv0: lcd-controller@1c73000 {
1171 compatible = "allwinner,sun8i-r40-tcon-tv";
1175 clock-names = "ahb", "tcon-ch1";
1177 reset-names = "lcd";
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1185 #address-cells = <1>;
1186 #size-cells = <0>;
1191 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
1196 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
1201 #address-cells = <1>;
1202 #size-cells = <0>;
1207 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
1213 tcon_tv1: lcd-controller@1c74000 {
1214 compatible = "allwinner,sun8i-r40-tcon-tv";
1218 clock-names = "ahb", "tcon-ch1";
1220 reset-names = "lcd";
1224 #address-cells = <1>;
1225 #size-cells = <0>;
1228 #address-cells = <1>;
1229 #size-cells = <0>;
1234 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv1>;
1239 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv1>;
1244 #address-cells = <1>;
1245 #size-cells = <0>;
1250 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv1>;
1256 gic: interrupt-controller@1c81000 {
1257 compatible = "arm,gic-400";
1262 interrupt-controller;
1263 #interrupt-cells = <3>;
1268 compatible = "allwinner,sun8i-r40-dw-hdmi",
1269 "allwinner,sun8i-a83t-dw-hdmi";
1271 reg-io-width = <1>;
1275 clock-names = "iahb", "isfr", "tmds", "cec";
1277 reset-names = "ctrl";
1279 phy-names = "phy";
1283 #address-cells = <1>;
1284 #size-cells = <0>;
1290 remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
1300 hdmi_phy: hdmi-phy@1ef0000 {
1301 compatible = "allwinner,sun8i-r40-hdmi-phy";
1305 clock-names = "bus", "mod", "pll-0", "pll-1";
1307 reset-names = "phy";
1308 #phy-cells = <0>;
1313 compatible = "arm,cortex-a7-pmu";
1318 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
1322 compatible = "arm,armv7-timer";