Lines Matching +full:mali +full:- +full:400
2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun6i-rtc.h>
48 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
49 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
57 #address-cells = <1>;
58 #size-cells = <1>;
61 simplefb_lcd: framebuffer-lcd0 {
62 compatible = "allwinner,simple-framebuffer",
63 "simple-framebuffer";
64 allwinner,pipeline = "de_be0-lcd0";
72 de: display-engine {
79 compatible = "arm,armv7-timer";
84 clock-frequency = <24000000>;
85 arm,cpu-registers-not-fw-configured;
89 enable-method = "allwinner,sun8i-a23";
90 #address-cells = <1>;
91 #size-cells = <0>;
94 compatible = "arm,cortex-a7";
100 compatible = "arm,cortex-a7";
107 #address-cells = <1>;
108 #size-cells = <1>;
112 #clock-cells = <0>;
113 compatible = "fixed-clock";
114 clock-frequency = <24000000>;
115 clock-accuracy = <50000>;
116 clock-output-names = "osc24M";
120 #clock-cells = <0>;
121 compatible = "fixed-clock";
122 clock-frequency = <32768>;
123 clock-accuracy = <50000>;
124 clock-output-names = "ext-osc32k";
129 compatible = "simple-bus";
130 #address-cells = <1>;
131 #size-cells = <1>;
134 system-control@1c00000 {
135 compatible = "allwinner,sun8i-a23-system-control";
137 #address-cells = <1>;
138 #size-cells = <1>;
142 compatible = "mmio-sram";
144 #address-cells = <1>;
145 #size-cells = <1>;
148 ve_sram: sram-section@0 {
149 compatible = "allwinner,sun8i-a23-sram-c1",
150 "allwinner,sun4i-a10-sram-c1";
156 dma: dma-controller@1c02000 {
157 compatible = "allwinner,sun8i-a23-dma";
162 #dma-cells = <1>;
165 nfc: nand-controller@1c03000 {
166 compatible = "allwinner,sun8i-a23-nand-controller";
170 clock-names = "ahb", "mod";
172 reset-names = "ahb";
174 dma-names = "rxtx";
175 pinctrl-names = "default";
176 pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
178 #address-cells = <1>;
179 #size-cells = <0>;
182 tcon0: lcd-controller@1c0c000 {
190 clock-names = "ahb",
191 "tcon-ch0",
192 "lvds-alt";
193 clock-output-names = "tcon-data-clock";
194 #clock-cells = <0>;
197 reset-names = "lcd",
202 #address-cells = <1>;
203 #size-cells = <0>;
209 remote-endpoint = <&drc0_out_tcon0>;
220 compatible = "allwinner,sun7i-a20-mmc";
226 clock-names = "ahb",
231 reset-names = "ahb";
233 pinctrl-names = "default";
234 pinctrl-0 = <&mmc0_pins>;
236 #address-cells = <1>;
237 #size-cells = <0>;
241 compatible = "allwinner,sun7i-a20-mmc";
247 clock-names = "ahb",
252 reset-names = "ahb";
255 #address-cells = <1>;
256 #size-cells = <0>;
260 compatible = "allwinner,sun7i-a20-mmc";
266 clock-names = "ahb",
271 reset-names = "ahb";
274 #address-cells = <1>;
275 #size-cells = <0>;
284 interrupt-names = "mc";
286 phy-names = "usb";
299 clock-names = "usb0_phy",
303 reset-names = "usb0_reset",
306 #phy-cells = <1>;
310 compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
316 phy-names = "usb";
321 compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
327 phy-names = "usb";
334 clock-names = "hosc", "losc";
335 #clock-cells = <1>;
336 #reset-cells = <1>;
342 interrupt-parent = <&r_intc>;
346 clock-names = "apb", "hosc", "losc";
347 gpio-controller;
348 interrupt-controller;
349 #interrupt-cells = <3>;
350 #gpio-cells = <3>;
352 i2c0_pins: i2c0-pins {
357 i2c1_pins: i2c1-pins {
362 i2c2_pins: i2c2-pins {
367 lcd_rgb666_pins: lcd-rgb666-pins {
375 mmc0_pins: mmc0-pins {
379 drive-strength = <30>;
380 bias-pull-up;
383 mmc1_pg_pins: mmc1-pg-pins {
387 drive-strength = <30>;
388 bias-pull-up;
391 mmc2_8bit_pins: mmc2-8bit-pins {
397 drive-strength = <30>;
398 bias-pull-up;
401 nand_pins: nand-pins {
408 nand_cs0_pin: nand-cs0-pin {
411 bias-pull-up;
414 nand_cs1_pin: nand-cs1-pin {
417 bias-pull-up;
420 nand_rb0_pin: nand-rb0-pin {
423 bias-pull-up;
426 nand_rb1_pin: nand-rb1-pin {
429 bias-pull-up;
432 pwm0_pin: pwm0-pin {
437 uart0_pf_pins: uart0-pf-pins {
442 uart1_pg_pins: uart1-pg-pins {
447 uart1_cts_rts_pg_pins: uart1-cts-rts-pg-pins {
454 compatible = "allwinner,sun8i-a23-timer";
462 compatible = "allwinner,sun6i-a31-wdt";
469 compatible = "allwinner,sun7i-a20-pwm";
472 #pwm-cells = <3>;
477 compatible = "allwinner,sun4i-a10-lradc-keys";
479 interrupt-parent = <&r_intc>;
485 compatible = "snps,dw-apb-uart";
488 reg-shift = <2>;
489 reg-io-width = <4>;
493 dma-names = "tx", "rx";
498 compatible = "snps,dw-apb-uart";
501 reg-shift = <2>;
502 reg-io-width = <4>;
506 dma-names = "tx", "rx";
511 compatible = "snps,dw-apb-uart";
514 reg-shift = <2>;
515 reg-io-width = <4>;
519 dma-names = "tx", "rx";
524 compatible = "snps,dw-apb-uart";
527 reg-shift = <2>;
528 reg-io-width = <4>;
532 dma-names = "tx", "rx";
537 compatible = "snps,dw-apb-uart";
540 reg-shift = <2>;
541 reg-io-width = <4>;
545 dma-names = "tx", "rx";
550 compatible = "allwinner,sun6i-a31-i2c";
555 pinctrl-names = "default";
556 pinctrl-0 = <&i2c0_pins>;
558 #address-cells = <1>;
559 #size-cells = <0>;
563 compatible = "allwinner,sun6i-a31-i2c";
568 pinctrl-names = "default";
569 pinctrl-0 = <&i2c1_pins>;
571 #address-cells = <1>;
572 #size-cells = <0>;
576 compatible = "allwinner,sun6i-a31-i2c";
581 pinctrl-names = "default";
582 pinctrl-0 = <&i2c2_pins>;
584 #address-cells = <1>;
585 #size-cells = <0>;
588 mali: gpu@1c40000 { label
589 compatible = "allwinner,sun8i-a23-mali",
590 "allwinner,sun7i-a20-mali", "arm,mali-400";
599 interrupt-names = "gp",
607 clock-names = "bus", "core";
609 #cooling-cells = <2>;
611 assigned-clocks = <&ccu CLK_GPU>;
612 assigned-clock-rates = <384000000>;
615 gic: interrupt-controller@1c81000 {
616 compatible = "arm,gic-400";
621 interrupt-controller;
622 #interrupt-cells = <3>;
626 fe0: display-frontend@1e00000 {
632 clock-names = "ahb", "mod",
637 #address-cells = <1>;
638 #size-cells = <0>;
644 remote-endpoint = <&be0_in_fe0>;
650 be0: display-backend@1e60000 {
656 clock-names = "ahb", "mod",
661 #address-cells = <1>;
662 #size-cells = <0>;
668 remote-endpoint = <&fe0_out_be0>;
676 remote-endpoint = <&drc0_in_be0>;
688 clock-names = "ahb", "mod", "ram";
692 #address-cells = <1>;
693 #size-cells = <0>;
699 remote-endpoint = <&be0_out_drc0>;
707 remote-endpoint = <&tcon0_in_drc0>;
714 compatible = "allwinner,sun8i-a23-rtc";
716 interrupt-parent = <&r_intc>;
719 clock-output-names = "osc32k", "osc32k-out";
721 #clock-cells = <1>;
724 r_intc: interrupt-controller@1f00c00 {
725 compatible = "allwinner,sun6i-a31-r-intc";
726 interrupt-controller;
727 #interrupt-cells = <3>;
733 compatible = "allwinner,sun8i-a23-prcm";
737 compatible = "fixed-factor-clock";
738 #clock-cells = <0>;
739 clock-div = <1>;
740 clock-mult = <1>;
742 clock-output-names = "ar100";
746 compatible = "fixed-factor-clock";
747 #clock-cells = <0>;
748 clock-div = <1>;
749 clock-mult = <1>;
751 clock-output-names = "ahb0";
755 compatible = "allwinner,sun8i-a23-apb0-clk";
756 #clock-cells = <0>;
758 clock-output-names = "apb0";
762 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
763 #clock-cells = <1>;
765 clock-output-names = "apb0_pio", "apb0_timer",
771 compatible = "allwinner,sun6i-a31-clock-reset";
772 #reset-cells = <1>;
775 codec_analog: codec-analog {
776 compatible = "allwinner,sun8i-a23-codec-analog";
781 compatible = "allwinner,sun8i-a23-cpuconfig";
786 compatible = "snps,dw-apb-uart";
789 reg-shift = <2>;
790 reg-io-width = <4>;
797 compatible = "allwinner,sun8i-a23-i2c",
798 "allwinner,sun6i-a31-i2c";
801 pinctrl-names = "default";
802 pinctrl-0 = <&r_i2c_pins>;
806 #address-cells = <1>;
807 #size-cells = <0>;
811 compatible = "allwinner,sun8i-a23-r-pinctrl";
813 interrupt-parent = <&r_intc>;
816 clock-names = "apb", "hosc", "losc";
817 gpio-controller;
818 interrupt-controller;
819 #interrupt-cells = <3>;
820 #gpio-cells = <3>;
822 r_i2c_pins: r-i2c-pins {
825 bias-pull-up;
828 r_rsb_pins: r-rsb-pins {
831 drive-strength = <20>;
832 bias-pull-up;
835 r_uart_pins_a: r-uart-pins {
842 compatible = "allwinner,sun8i-a23-rsb";
846 clock-frequency = <3000000>;
848 pinctrl-names = "default";
849 pinctrl-0 = <&r_rsb_pins>;
851 #address-cells = <1>;
852 #size-cells = <0>;