Lines Matching +full:1 +full:c23800
54 #address-cells = <1>;
55 #size-cells = <1>;
62 #address-cells = <1>;
63 #size-cells = <1>;
100 #address-cells = <1>;
121 cpu1: cpu@1 {
124 reg = <1>;
174 #address-cells = <1>;
175 #size-cells = <1>;
203 #address-cells = <1>;
204 #size-cells = <1>;
244 gmac_tx_clk: clk@1c20164 {
262 #address-cells = <1>;
263 #size-cells = <1>;
266 system-control@1c00000 {
270 #address-cells = <1>;
271 #size-cells = <1>;
277 #address-cells = <1>;
278 #size-cells = <1>;
292 #address-cells = <1>;
293 #size-cells = <1>;
304 sram_c: sram@1d00000 {
307 #address-cells = <1>;
308 #size-cells = <1>;
319 nmi_intc: interrupt-controller@1c00030 {
327 dma: dma-controller@1c02000 {
335 nfc: nand-controller@1c03000 {
344 #address-cells = <1>;
348 spi0: spi@1c05000 {
358 #address-cells = <1>;
363 spi1: spi@1c06000 {
373 #address-cells = <1>;
375 num-cs = <1>;
378 csi0: csi@1c09000 {
388 emac: ethernet@1c0b000 {
393 allwinner,sram = <&emac_sram 1>;
397 mdio: mdio@1c0b080 {
401 #address-cells = <1>;
405 tcon0: lcd-controller@1c0c000 {
423 #address-cells = <1>;
427 #address-cells = <1>;
436 tcon0_in_be1: endpoint@1 {
437 reg = <1>;
442 tcon0_out: port@1 {
443 #address-cells = <1>;
445 reg = <1>;
447 tcon0_out_hdmi: endpoint@1 {
448 reg = <1>;
450 allwinner,tcon-channel = <1>;
456 tcon1: lcd-controller@1c0d000 {
474 #address-cells = <1>;
478 #address-cells = <1>;
487 tcon1_in_be1: endpoint@1 {
488 reg = <1>;
493 tcon1_out: port@1 {
494 #address-cells = <1>;
496 reg = <1>;
498 tcon1_out_hdmi: endpoint@1 {
499 reg = <1>;
501 allwinner,tcon-channel = <1>;
507 video-codec@1c0e000 {
515 allwinner,sram = <&ve_sram 1>;
518 mmc0: mmc@1c0f000 {
533 #address-cells = <1>;
537 mmc1: mmc@1c10000 {
550 #address-cells = <1>;
554 mmc2: mmc@1c11000 {
569 #address-cells = <1>;
573 mmc3: mmc@1c12000 {
588 #address-cells = <1>;
592 usb_otg: usb@1c13000 {
601 allwinner,sram = <&otg_sram 1>;
606 usbphy: phy@1c13400 {
607 #phy-cells = <1>;
620 ehci0: usb@1c14000 {
625 phys = <&usbphy 1>;
630 ohci0: usb@1c14400 {
635 phys = <&usbphy 1>;
640 crypto: crypto-engine@1c15000 {
649 hdmi: hdmi@1c16000 {
657 clock-names = "ahb", "mod", "pll-0", "pll-1";
665 #address-cells = <1>;
669 #address-cells = <1>;
678 hdmi_in_tcon1: endpoint@1 {
679 reg = <1>;
684 hdmi_out: port@1 {
685 reg = <1>;
690 spi2: spi@1c17000 {
700 #address-cells = <1>;
702 num-cs = <1>;
705 ahci: sata@1c18000 {
713 ehci1: usb@1c1c000 {
723 ohci1: usb@1c1c400 {
733 csi1: csi@1c1d000 {
744 spi3: spi@1c1f000 {
754 #address-cells = <1>;
756 num-cs = <1>;
759 ccu: clock@1c20000 {
764 #clock-cells = <1>;
765 #reset-cells = <1>;
768 pio: pinctrl@1c20800 {
983 ps2_1_ph_pins: ps2-1-ph-pins {
1182 timer@1c20c00 {
1194 wdt: watchdog@1c20c90 {
1201 rtc: rtc@1c20d00 {
1207 pwm: pwm@1c20e00 {
1215 spdif: spdif@1c21000 {
1228 ir0: ir@1c21800 {
1237 ir1: ir@1c21c00 {
1246 i2s1: i2s@1c22000 {
1259 i2s0: i2s@1c22400 {
1272 lradc: lradc@1c22800 {
1279 codec: codec@1c22c00 {
1292 sid: eeprom@1c23800 {
1297 i2s2: i2s@1c24400 {
1310 rtp: rtp@1c25000 {
1317 uart0: serial@1c28000 {
1320 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
1327 uart1: serial@1c28400 {
1337 uart2: serial@1c28800 {
1347 uart3: serial@1c28c00 {
1357 uart4: serial@1c29000 {
1367 uart5: serial@1c29400 {
1377 uart6: serial@1c29800 {
1387 uart7: serial@1c29c00 {
1397 ps20: ps2@1c2a000 {
1405 ps21: ps2@1c2a400 {
1413 i2c0: i2c@1c2ac00 {
1422 #address-cells = <1>;
1426 i2c1: i2c@1c2b000 {
1435 #address-cells = <1>;
1439 i2c2: i2c@1c2b400 {
1448 #address-cells = <1>;
1452 i2c3: i2c@1c2b800 {
1461 #address-cells = <1>;
1465 can0: can@1c2bc00 {
1474 i2c4: i2c@1c2c000 {
1481 #address-cells = <1>;
1485 mali: gpu@1c40000 {
1510 gmac: ethernet@1c50000 {
1524 #address-cells = <1>;
1529 hstimer@1c60000 {
1539 gic: interrupt-controller@1c81000 {
1550 fe0: display-frontend@1e00000 {
1561 #address-cells = <1>;
1564 fe0_out: port@1 {
1565 #address-cells = <1>;
1567 reg = <1>;
1574 fe0_out_be1: endpoint@1 {
1575 reg = <1>;
1582 fe1: display-frontend@1e20000 {
1593 #address-cells = <1>;
1596 fe1_out: port@1 {
1597 #address-cells = <1>;
1599 reg = <1>;
1606 fe1_out_be1: endpoint@1 {
1607 reg = <1>;
1614 be1: display-backend@1e40000 {
1625 #address-cells = <1>;
1629 #address-cells = <1>;
1638 be1_in_fe1: endpoint@1 {
1639 reg = <1>;
1644 be1_out: port@1 {
1645 #address-cells = <1>;
1647 reg = <1>;
1654 be1_out_tcon1: endpoint@1 {
1655 reg = <1>;
1662 be0: display-backend@1e60000 {
1673 #address-cells = <1>;
1677 #address-cells = <1>;
1686 be0_in_fe1: endpoint@1 {
1687 reg = <1>;
1692 be0_out: port@1 {
1693 #address-cells = <1>;
1695 reg = <1>;
1702 be0_out_tcon1: endpoint@1 {
1703 reg = <1>;