Lines Matching +full:mali +full:- +full:400
2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
56 #size-cells = <0>;
60 compatible = "arm,cortex-a8";
67 #address-cells = <1>;
68 #size-cells = <1>;
71 framebuffer-lcd0 {
72 compatible = "allwinner,simple-framebuffer",
73 "simple-framebuffer";
74 allwinner,pipeline = "de_be0-lcd0";
80 framebuffer-lcd0-tve0 {
81 compatible = "allwinner,simple-framebuffer",
82 "simple-framebuffer";
83 allwinner,pipeline = "de_be0-lcd0-tve0";
92 #address-cells = <1>;
93 #size-cells = <1>;
96 osc24M: clk-24M {
97 #clock-cells = <0>;
98 compatible = "fixed-clock";
99 clock-frequency = <24000000>;
100 clock-output-names = "osc24M";
103 osc32k: clk-32k {
104 #clock-cells = <0>;
105 compatible = "fixed-clock";
106 clock-frequency = <32768>;
107 clock-output-names = "osc32k";
111 reserved-memory {
112 #address-cells = <1>;
113 #size-cells = <1>;
117 default-pool {
118 compatible = "shared-dma-pool";
120 alloc-ranges = <0x40000000 0x10000000>;
122 linux,cma-default;
127 compatible = "simple-bus";
128 #address-cells = <1>;
129 #size-cells = <1>;
130 dma-ranges;
133 system-control@1c00000 {
134 compatible = "allwinner,sun5i-a13-system-control";
136 #address-cells = <1>;
137 #size-cells = <1>;
141 compatible = "mmio-sram";
143 #address-cells = <1>;
144 #size-cells = <1>;
147 emac_sram: sram-section@8000 {
148 compatible = "allwinner,sun5i-a13-sram-a3-a4",
149 "allwinner,sun4i-a10-sram-a3-a4";
156 compatible = "mmio-sram";
158 #address-cells = <1>;
159 #size-cells = <1>;
162 otg_sram: sram-section@0 {
163 compatible = "allwinner,sun5i-a13-sram-d",
164 "allwinner,sun4i-a10-sram-d";
171 compatible = "mmio-sram";
173 #address-cells = <1>;
174 #size-cells = <1>;
177 ve_sram: sram-section@0 {
178 compatible = "allwinner,sun5i-a13-sram-c1",
179 "allwinner,sun4i-a10-sram-c1";
185 mbus: dram-controller@1c01000 {
186 compatible = "allwinner,sun5i-a13-mbus";
189 #address-cells = <1>;
190 #size-cells = <1>;
191 dma-ranges = <0x00000000 0x40000000 0x20000000>;
192 #interconnect-cells = <1>;
195 dma: dma-controller@1c02000 {
196 compatible = "allwinner,sun4i-a10-dma";
200 #dma-cells = <2>;
203 nfc: nand-controller@1c03000 {
204 compatible = "allwinner,sun4i-a10-nand";
208 clock-names = "ahb", "mod";
210 dma-names = "rxtx";
212 #address-cells = <1>;
213 #size-cells = <0>;
217 compatible = "allwinner,sun4i-a10-spi";
221 clock-names = "ahb", "mod";
224 dma-names = "rx", "tx";
226 #address-cells = <1>;
227 #size-cells = <0>;
231 compatible = "allwinner,sun4i-a10-spi";
235 clock-names = "ahb", "mod";
238 dma-names = "rx", "tx";
240 #address-cells = <1>;
241 #size-cells = <0>;
244 tve0: tv-encoder@1c0a000 {
245 compatible = "allwinner,sun4i-a10-tv-encoder";
254 remote-endpoint = <&tcon0_out_tve0>;
260 compatible = "allwinner,sun4i-a10-emac";
269 compatible = "allwinner,sun4i-a10-mdio";
272 #address-cells = <1>;
273 #size-cells = <0>;
276 tcon0: lcd-controller@1c0c000 {
277 compatible = "allwinner,sun5i-a13-tcon";
282 reset-names = "lcd";
286 clock-names = "ahb",
287 "tcon-ch0",
288 "tcon-ch1";
289 clock-output-names = "tcon-data-clock";
290 #clock-cells = <0>;
294 #address-cells = <1>;
295 #size-cells = <0>;
301 remote-endpoint = <&be0_out_tcon0>;
306 #address-cells = <1>;
307 #size-cells = <0>;
312 remote-endpoint = <&tve0_in_tcon0>;
313 allwinner,tcon-channel = <1>;
319 video-codec@1c0e000 {
320 compatible = "allwinner,sun5i-a13-video-engine";
324 clock-names = "ahb", "mod", "ram";
331 compatible = "allwinner,sun5i-a13-mmc";
334 clock-names = "ahb", "mmc";
336 pinctrl-names = "default";
337 pinctrl-0 = <&mmc0_pins>;
339 #address-cells = <1>;
340 #size-cells = <0>;
344 compatible = "allwinner,sun5i-a13-mmc";
347 clock-names = "ahb", "mmc";
350 #address-cells = <1>;
351 #size-cells = <0>;
355 compatible = "allwinner,sun5i-a13-mmc";
358 clock-names = "ahb", "mmc";
361 #address-cells = <1>;
362 #size-cells = <0>;
366 compatible = "allwinner,sun4i-a10-musb";
370 interrupt-names = "mc";
372 phy-names = "usb";
380 #phy-cells = <1>;
381 compatible = "allwinner,sun5i-a13-usb-phy";
383 reg-names = "phy_ctrl", "pmu1";
385 clock-names = "usb_phy";
387 reset-names = "usb0_reset", "usb1_reset";
392 compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
397 phy-names = "usb";
402 compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
407 phy-names = "usb";
411 crypto: crypto-engine@1c15000 {
412 compatible = "allwinner,sun5i-a13-crypto",
413 "allwinner,sun4i-a10-crypto";
417 clock-names = "ahb", "mod";
421 compatible = "allwinner,sun4i-a10-spi";
425 clock-names = "ahb", "mod";
428 dma-names = "rx", "tx";
430 #address-cells = <1>;
431 #size-cells = <0>;
437 clock-names = "hosc", "losc";
438 #clock-cells = <1>;
439 #reset-cells = <1>;
442 intc: interrupt-controller@1c20400 {
443 compatible = "allwinner,sun4i-a10-ic";
445 interrupt-controller;
446 #interrupt-cells = <1>;
453 clock-names = "apb", "hosc", "losc";
454 gpio-controller;
455 interrupt-controller;
456 #interrupt-cells = <3>;
457 #gpio-cells = <3>;
459 emac_pd_pins: emac-pd-pins {
468 i2c0_pins: i2c0-pins {
473 i2c1_pins: i2c1-pins {
478 i2c2_pins: i2c2-pins {
483 ir0_rx_pin: ir0-rx-pin {
488 lcd_rgb565_pins: lcd-rgb565-pins {
496 lcd_rgb666_pins: lcd-rgb666-pins {
504 mmc0_pins: mmc0-pins {
508 drive-strength = <30>;
509 bias-pull-up;
512 mmc2_4bit_pc_pins: mmc2-4bit-pc-pins {
516 drive-strength = <30>;
517 bias-pull-up;
520 /omit-if-no-ref/
521 mmc2_4bit_pe_pins: mmc2-4bit-pe-pins {
525 drive-strength = <30>;
526 bias-pull-up;
529 mmc2_8bit_pins: mmc2-8bit-pins {
534 drive-strength = <30>;
535 bias-pull-up;
538 nand_pins: nand-pins {
546 nand_cs0_pin: nand-cs0-pin {
551 nand_rb0_pin: nand-rb0-pin {
556 pwm0_pin: pwm0-pin {
561 spi2_pe_pins: spi2-pe-pins {
566 spi2_cs0_pe_pin: spi2-cs0-pe-pin {
571 uart1_pe_pins: uart1-pe-pins {
576 uart1_pg_pins: uart1-pg-pins {
581 uart2_pd_pins: uart2-pd-pins {
586 uart2_cts_rts_pd_pins: uart2-cts-rts-pd-pins {
591 uart3_pg_pins: uart3-pg-pins {
596 uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins {
603 compatible = "allwinner,sun4i-a10-timer";
615 compatible = "allwinner,sun4i-a10-wdt";
622 compatible = "allwinner,sun4i-a10-ir";
624 clock-names = "apb", "ir";
631 compatible = "allwinner,sun4i-a10-lradc-keys";
638 #sound-dai-cells = <0>;
639 compatible = "allwinner,sun4i-a10-codec";
643 clock-names = "apb", "codec";
646 dma-names = "rx", "tx";
651 compatible = "allwinner,sun4i-a10-sid";
656 compatible = "allwinner,sun5i-a13-ts";
659 #thermal-sensor-cells = <0>;
663 compatible = "snps,dw-apb-uart";
666 reg-shift = <2>;
667 reg-io-width = <4>;
673 compatible = "snps,dw-apb-uart";
676 reg-shift = <2>;
677 reg-io-width = <4>;
683 compatible = "snps,dw-apb-uart";
686 reg-shift = <2>;
687 reg-io-width = <4>;
693 compatible = "snps,dw-apb-uart";
696 reg-shift = <2>;
697 reg-io-width = <4>;
703 compatible = "allwinner,sun4i-a10-i2c";
707 pinctrl-names = "default";
708 pinctrl-0 = <&i2c0_pins>;
710 #address-cells = <1>;
711 #size-cells = <0>;
715 compatible = "allwinner,sun4i-a10-i2c";
719 pinctrl-names = "default";
720 pinctrl-0 = <&i2c1_pins>;
722 #address-cells = <1>;
723 #size-cells = <0>;
727 compatible = "allwinner,sun4i-a10-i2c";
731 pinctrl-names = "default";
732 pinctrl-0 = <&i2c2_pins>;
734 #address-cells = <1>;
735 #size-cells = <0>;
738 mali: gpu@1c40000 { label
739 compatible = "allwinner,sun4i-a10-mali", "arm,mali-400";
742 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pmu";
744 clock-names = "bus", "core";
746 assigned-clocks = <&ccu CLK_GPU>;
747 assigned-clock-rates = <320000000>;
751 compatible = "allwinner,sun5i-a13-hstimer";
757 fe0: display-frontend@1e00000 {
758 compatible = "allwinner,sun5i-a13-display-frontend";
763 clock-names = "ahb", "mod",
767 interconnect-names = "dma-mem";
771 #address-cells = <1>;
772 #size-cells = <0>;
778 remote-endpoint = <&be0_in_fe0>;
784 be0: display-backend@1e60000 {
785 compatible = "allwinner,sun5i-a13-display-backend";
790 clock-names = "ahb", "mod",
794 interconnect-names = "dma-mem";
798 #address-cells = <1>;
799 #size-cells = <0>;
805 remote-endpoint = <&fe0_out_be0>;
813 remote-endpoint = <&tcon0_in_be0>;