Lines Matching +full:phy +full:- +full:cadence

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence USBSS-DRD controller
10   - Pawel Laszczak <pawell@cadence.com>
18       - description: OTG controller registers
19       - description: XHCI Host controller registers
20       - description: DEVICE controller registers
22   reg-names:
24       - const: otg
25       - const: xhci
26       - const: dev
31       - description: XHCI host controller interrupt
32       - description: Device controller interrupt
33       - description: OTG/DRD controller interrupt
34       - description: interrupt used to wake up core, e.g when usbcmd.rs is
37   interrupt-names:
40       - const: host
41       - const: peripheral
42       - const: otg
43       - const: wakeup
48   maximum-speed:
49     enum: [super-speed, high-speed, full-speed]
55   phy-names:
60         - const: cdns3,usb2-phy
61         - const: cdns3,usb3-phy
63   cdns,on-chip-buff-size:
69   cdns,phyrst-a-enable:
70     description: Enable resetting of PHY if Rx fail is detected
74   - compatible
75   - reg
76   - reg-names
77   - interrupts
78   - interrupt-names
83   - |
84     #include <dt-bindings/interrupt-controller/arm-gic.h>
86         #address-cells = <2>;
87         #size-cells = <2>;
94             reg-names = "otg", "xhci", "dev";
98             interrupt-names = "host", "peripheral", "otg";
99             maximum-speed = "super-speed";