Lines Matching +full:versal +full:- +full:clk

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-zynqmp-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Michal Simek <michal.simek@amd.com>
13   - $ref: spi-controller.yaml#
18       - xlnx,versal-qspi-1.0
19       - xlnx,zynqmp-qspi-1.0
27   clock-names:
29       - const: ref_clk
30       - const: pclk
38   power-domains:
42   - compatible
43   - reg
44   - interrupts
45   - clock-names
46   - clocks
51   - |
52     #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
54       #address-cells = <2>;
55       #size-cells = <2>;
58         compatible = "xlnx,zynqmp-qspi-1.0";
60         clock-names = "ref_clk", "pclk";
62         interrupt-parent = <&gic>;