Lines Matching +full:- +full:reset

1 UniPhier glue reset controller
4 Peripheral core reset in glue layer
5 -----------------------------------
7 Some peripheral core reset belongs to its own glue layer. Before using
8 this core reset, it is necessary to control the clocks and resets to enable
12 - compatible: Should be
13     "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
14     "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3
15     "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
16     "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
17     "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3
18     "socionext,uniphier-pro4-ahci-reset" - for Pro4 SoC AHCI
19     "socionext,uniphier-pxs2-ahci-reset" - for PXs2 SoC AHCI
20     "socionext,uniphier-pxs3-ahci-reset" - for PXs3 SoC AHCI
21 - #reset-cells: Should be 1.
22 - reg: Specifies offset and length of the register set for the device.
23 - clocks: A list of phandles to the clock gate for the glue layer.
24 	According to the clock-names, appropriate clocks are required.
25 - clock-names: Should contain
26     "gio", "link" - for Pro4 and Pro5 SoCs
27     "link"        - for others
28 - resets: A list of phandles to the reset control for the glue layer.
29 	According to the reset-names, appropriate resets are required.
30 - reset-names: Should contain
31     "gio", "link" - for Pro4 and Pro5 SoCs
32     "link"        - for others
36 	usb-glue@65b00000 {
37 		compatible = "socionext,uniphier-ld20-dwc3-glue",
38 			     "simple-mfd";
39 		#address-cells = <1>;
40 		#size-cells = <1>;
43 		usb_rst: reset@0 {
44 			compatible = "socionext,uniphier-ld20-usb3-reset";
46 			#reset-cells = <1>;
47 			clock-names = "link";
49 			reset-names = "link";