Lines Matching +full:zynq +full:- +full:can +full:- +full:1

1 	Binding for Xilinx Zynq Pinctrl
4 - compatible: "xlnx,zynq-pinctrl"
5 - syscon: phandle to SLCR
6 - reg: Offset and length of pinctrl space in SLCR
8 Please refer to pinctrl-bindings.txt in this directory for details of the
12 Zynq's pin configuration nodes act as a container for an arbitrary number of
14 pin, a group, or a list of pins or groups. This configuration can include the
16 parameters, such as pull-up, slew rate, etc.
18 Each configuration node can consist of multiple nodes describing the pinmux and
19 pinconf options. Those nodes can be pinmux nodes or pinconf nodes.
25  - groups: A list of pinmux groups.
26  - function: The name of a pinmux function to activate for the specified set
31  - pins: a list of pin names
32  - groups: A list of pinmux groups.
34 The following generic properties as defined in pinctrl-bindings.txt are valid
38 The following generic properties as defined in pinctrl-bindings.txt are valid
40  groups, pins, bias-disable, bias-high-impedance, bias-pull-up, slew-rate,
41  low-power-disable, low-power-enable
43  Valid arguments for 'slew-rate' are '0' and '1' to select between slow and fast
48    qspi0_0_grp, qspi1_0_grp, qspi_fbclk, qspi_cs1_grp, spi0_0_grp - spi0_2_grp,
49    spi0_X_ssY (X=0..2, Y=0..2), spi1_0_grp - spi1_3_grp,
50    spi1_X_ssY (X=0..3, Y=0..2), sdio0_0_grp - sdio0_2_grp,
51    sdio1_0_grp - sdio1_3_grp, sdio0_emio_wp, sdio0_emio_cd, sdio1_emio_wp,
53    can0_0_grp - can0_10_grp, can1_0_grp - can1_11_grp, uart0_0_grp - uart0_10_grp,
54    uart1_0_grp - uart1_11_grp, i2c0_0_grp - i2c0_10_grp, i2c1_0_grp - i2c1_10_grp,
55    ttc0_0_grp - ttc0_2_grp, ttc1_0_grp - ttc1_2_grp, swdt0_0_grp - swdt0_4_grp,
56    gpio0_0_grp - gpio0_53_grp, usb0_0_grp, usb1_0_grp
59    MIO0 - MIO53
68 The following driver-specific properties as defined here are valid to specify in
70  - io-standard: Configure the pin to use the selected IO standard according to
72     1: LVCMOS18
79 		compatible = "xlnx,pinctrl-zynq";
83 		pinctrl_uart1_default: uart1-default {
91 				slew-rate = <0>;
92 				io-standard = <1>;
95 			conf-rx {
97 				bias-high-impedance;
100 			conf-tx {
102 				bias-disable;