Lines Matching +full:8 +full:- +full:pin
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Sunplus SP7021 Pin Controller
11 - Dvorkin Dmitry <dvorkin@tibbo.com>
12 - Wells Lu <wellslutw@gmail.com>
15 The Sunplus SP7021 pin controller is used to control SoC pins. Please
16 refer to pinctrl-bindings.txt in this directory for details of the common
23 (1) function-group pins:
24 Ex 1 (SPI-NOR flash):
25 If control-field SPI_FLASH_SEL is set to 1, GPIO 83, 84, 86 and 87
26 will be pins of SPI-NOR flash. If it is set to 2, GPIO 76, 78, 79
27 and 81 will be pins of SPI-NOR flash.
30 If control-bit UA0_SEL is set to 1, GPIO 88 and 89 will be TX and
34 If control-bit EMMC_SEL is set to 1, GPIO 72, 73, 74, 75, 76, 77,
37 Properties "function" and "groups" are used to select function-group
40 (2) fully pin-mux (like phone exchange mux) pins:
41 GPIO 8 to 71 are 'fully pin-mux' pins. Any pins of peripherals of
43 can be routed to any pins of fully pin-mux pins.
46 If control-field UA1_TX_SEL is set to 3, TX pin of UART_1 will be
47 routed to GPIO 10 (3 - 1 + 8 = 10).
48 If control-field UA1_RX_SEL is set to 4, RX pin of UART_1 will be
49 routed to GPIO 11 (4 - 1 + 8 = 11).
50 If control-field UA1_RTS_SEL is set to 5, RTS pin of UART_1 will
51 be routed to GPIO 12 (5 - 1 + 8 = 12).
52 If control-field UA1_CTS_SEL is set to 6, CTS pin of UART_1 will
53 be routed to GPIO 13 (6 - 1 + 8 = 13).
56 If control-field I2C0_CLK_SEL is set to 20, CLK pin of I2C_0 will
57 be routed to GPIO 27 (20 - 1 + 8 = 27).
58 If control-field I2C0_DATA_SEL is set to 21, DATA pin of I2C_0
59 will be routed to GPIO 28 (21 - 1 + 9 = 28).
62 routed to any of 64 'fully pin-mux' pins.
65 SP7021 has a built-in I/O processor.
68 Vendor property "sunplus,pins" is used to select "fully pin-mux" pins,
71 The device node of pin controller of Sunplus SP7021 has following
76 const: sunplus,sp7021-pctl
78 gpio-controller: true
80 '#gpio-cells':
85 - description: the MOON2 registers
86 - description: the GPIOXT registers
87 - description: the FIRST registers
88 - description: the MOON1 registers
90 reg-names:
92 - const: moon2
93 - const: gpioxt
94 - const: first
95 - const: moon1
104 '-pins$':
108 pins or function-pins group available on the machine. Each subnode
111 Pinctrl node's client devices use subnodes for desired pin
113 $ref: pinmux-node.yaml#
122 setting for corresponding pin. Each integer defines a individual
123 pin in which:
126 Bit 23~16: defines types: (1) fully pin-mux pins
129 Bit 15~8: defines pins of peripherals (which are defined in
130 'include/dt-binging/pinctrl/sppctl.h').
131 Bit 7~0: defines types or initial-state of digital GPIO pins.
135 $ref: /schemas/types.yaml#/definitions/uint32-array
139 Define pin-function which is used by pinctrl node's client device.
147 Define pin-group in a specified pin-function.
158 Some pins may be enabled by boot-loader. We can use this
160 $ref: /schemas/types.yaml#/definitions/uint32-array
165 - if:
169 - SPI_FLASH
174 - SPI_FLASH1
175 - SPI_FLASH2
176 - if:
180 - SPI_FLASH_4BIT
185 - SPI_FLASH_4BIT1
186 - SPI_FLASH_4BIT2
187 - if:
191 - SPI_NAND
196 - SPI_NAND
197 - if:
201 - CARD0_EMMC
206 - CARD0_EMMC
207 - if:
211 - SD_CARD
216 - SD_CARD
217 - if:
221 - UA0
226 - UA0
227 - if:
231 - FPGA_IFX
236 - FPGA_IFX
237 - if:
241 - HDMI_TX
246 - HDMI_TX1
247 - HDMI_TX2
248 - HDMI_TX3
249 - if:
253 - LCDIF
258 - LCDIF
259 - if:
263 - USB0_OTG
268 - USB0_OTG
269 - if:
273 - USB1_OTG
278 - USB1_OTG
281 - compatible
282 - reg
283 - reg-names
284 - "#gpio-cells"
285 - gpio-controller
286 - clocks
287 - resets
292 - $ref: pinctrl.yaml#
295 - |
296 #include <dt-bindings/pinctrl/sppctl-sp7021.h>
299 compatible = "sunplus,sp7021-pctl";
302 reg-names = "moon2", "gpioxt", "first", "moon1";
303 gpio-controller;
304 #gpio-cells = <2>;
308 uart0-pins {
313 spinand0-pins {
318 uart1-pins {
325 uart2-pins {
334 emmc-pins {
339 sdcard-pins {
345 hdmi_A_tx1-pins {
349 hdmi_A_tx2-pins {
353 hdmi_A_tx3-pins {
358 ethernet-pins {