Lines Matching +full:8 +full:- +full:pin
4 - compatible: Should be one of the following
5 "mediatek,mt7622-pinctrl" for MT7622 SoC
6 "mediatek,mt7629-pinctrl" for MT7629 SoC
7 - reg: offset and length of the pinctrl space
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells: Should be two. The first cell is the pin number and the
14 - interrupt-controller : Marks the device node as an interrupt controller
16 If the property interrupt-controller is defined, following property is required
17 - reg-names: A string describing the "reg" entries. Must contain "eint".
18 - interrupts : The interrupt output from the controller.
19 - #interrupt-cells: Should be two.
21 Please refer to pinctrl-bindings.txt in this directory for details of the
23 phrase "pin configuration node".
25 MT7622 pin configuration nodes act as a container for an arbitrary number of
27 pin, a group, or a list of pins or groups. This configuration can include the
28 mux function to select on those pin(s)/group(s), and various pin configuration
29 parameters, such as pull-up, slew rate, etc.
40 The following generic properties as defined in pinctrl-bindings.txt are valid
44 - groups: An array of strings. Each string contains the name of a group.
46 - function: A string containing the name of the function to mux to the
51 The following generic properties as defined in pinctrl-bindings.txt are valid
55 - pins: An array of strings. Each string contains the name of a pin.
57 - groups: An array of strings. Each string contains the name of a group.
61 bias-disable, bias-pull, bias-pull-down, input-enable,
62 input-schmitt-enable, input-schmitt-disable, output-enable
63 output-low, output-high, drive-strength, slew-rate
65 Valid arguments for 'slew-rate' are '0' for no slew rate controlled and '1' for
67 Valid arguments for 'drive-strength', 4, 8, 12, or 16 in mA.
73 - mediatek,tdsel: An integer describing the steps for output level shifter duty
76 - mediatek,rdsel: An integer describing the steps for input level shifter duty
83 pins can be referenced via the pin names as the below table shown and the
88 Pin #: Valid values for pins
89 -----------------------------
90 PIN 0: "GPIO_A"
91 PIN 1: "I2S1_IN"
92 PIN 2: "I2S1_OUT"
93 PIN 3: "I2S_BCLK"
94 PIN 4: "I2S_WS"
95 PIN 5: "I2S_MCLK"
96 PIN 6: "TXD0"
97 PIN 7: "RXD0"
98 PIN 8: "SPI_WP"
99 PIN 9: "SPI_HOLD"
100 PIN 10: "SPI_CLK"
101 PIN 11: "SPI_MOSI"
102 PIN 12: "SPI_MISO"
103 PIN 13: "SPI_CS"
104 PIN 14: "I2C_SDA"
105 PIN 15: "I2C_SCL"
106 PIN 16: "I2S2_IN"
107 PIN 17: "I2S3_IN"
108 PIN 18: "I2S4_IN"
109 PIN 19: "I2S2_OUT"
110 PIN 20: "I2S3_OUT"
111 PIN 21: "I2S4_OUT"
112 PIN 22: "GPIO_B"
113 PIN 23: "MDC"
114 PIN 24: "MDIO"
115 PIN 25: "G2_TXD0"
116 PIN 26: "G2_TXD1"
117 PIN 27: "G2_TXD2"
118 PIN 28: "G2_TXD3"
119 PIN 29: "G2_TXEN"
120 PIN 30: "G2_TXC"
121 PIN 31: "G2_RXD0"
122 PIN 32: "G2_RXD1"
123 PIN 33: "G2_RXD2"
124 PIN 34: "G2_RXD3"
125 PIN 35: "G2_RXDV"
126 PIN 36: "G2_RXC"
127 PIN 37: "NCEB"
128 PIN 38: "NWEB"
129 PIN 39: "NREB"
130 PIN 40: "NDL4"
131 PIN 41: "NDL5"
132 PIN 42: "NDL6"
133 PIN 43: "NDL7"
134 PIN 44: "NRB"
135 PIN 45: "NCLE"
136 PIN 46: "NALE"
137 PIN 47: "NDL0"
138 PIN 48: "NDL1"
139 PIN 49: "NDL2"
140 PIN 50: "NDL3"
141 PIN 51: "MDI_TP_P0"
142 PIN 52: "MDI_TN_P0"
143 PIN 53: "MDI_RP_P0"
144 PIN 54: "MDI_RN_P0"
145 PIN 55: "MDI_TP_P1"
146 PIN 56: "MDI_TN_P1"
147 PIN 57: "MDI_RP_P1"
148 PIN 58: "MDI_RN_P1"
149 PIN 59: "MDI_RP_P2"
150 PIN 60: "MDI_RN_P2"
151 PIN 61: "MDI_TP_P2"
152 PIN 62: "MDI_TN_P2"
153 PIN 63: "MDI_TP_P3"
154 PIN 64: "MDI_TN_P3"
155 PIN 65: "MDI_RP_P3"
156 PIN 66: "MDI_RN_P3"
157 PIN 67: "MDI_RP_P4"
158 PIN 68: "MDI_RN_P4"
159 PIN 69: "MDI_TP_P4"
160 PIN 70: "MDI_TN_P4"
161 PIN 71: "PMIC_SCL"
162 PIN 72: "PMIC_SDA"
163 PIN 73: "SPIC1_CLK"
164 PIN 74: "SPIC1_MOSI"
165 PIN 75: "SPIC1_MISO"
166 PIN 76: "SPIC1_CS"
167 PIN 77: "GPIO_D"
168 PIN 78: "WATCHDOG"
169 PIN 79: "RTS3_N"
170 PIN 80: "CTS3_N"
171 PIN 81: "TXD3"
172 PIN 82: "RXD3"
173 PIN 83: "PERST0_N"
174 PIN 84: "PERST1_N"
175 PIN 85: "WLED_N"
176 PIN 86: "EPHY_LED0_N"
177 PIN 87: "AUXIN0"
178 PIN 88: "AUXIN1"
179 PIN 89: "AUXIN2"
180 PIN 90: "AUXIN3"
181 PIN 91: "TXD4"
182 PIN 92: "RXD4"
183 PIN 93: "RTS4_N"
184 PIN 94: "CST4_N"
185 PIN 95: "PWM1"
186 PIN 96: "PWM2"
187 PIN 97: "PWM3"
188 PIN 98: "PWM4"
189 PIN 99: "PWM5"
190 PIN 100: "PWM6"
191 PIN 101: "PWM7"
192 PIN 102: "GPIO_E"
200 applicable function and which relevant pins (in pin#) are able applied for that
203 Valid value function pins (in pin#)
204 -------------------------------------------------------------------------
256 "snfi" "flash" 8, 9, 10, 11, 12, 13
257 "spi_nor" "flash" 8, 9, 10, 11, 12, 13
296 "spic2_0_wp_hold" "spi" 8, 9
298 "tdm_0_out_mclk_bclk_ws" "tdm" 8, 9, 10
331 Pin #: Valid values for pins
332 -----------------------------
333 PIN 0: "TOP_5G_CLK"
334 PIN 1: "TOP_5G_DATA"
335 PIN 2: "WF0_5G_HB0"
336 PIN 3: "WF0_5G_HB1"
337 PIN 4: "WF0_5G_HB2"
338 PIN 5: "WF0_5G_HB3"
339 PIN 6: "WF0_5G_HB4"
340 PIN 7: "WF0_5G_HB5"
341 PIN 8: "WF0_5G_HB6"
342 PIN 9: "XO_REQ"
343 PIN 10: "TOP_RST_N"
344 PIN 11: "SYS_WATCHDOG"
345 PIN 12: "EPHY_LED0_N_JTDO"
346 PIN 13: "EPHY_LED1_N_JTDI"
347 PIN 14: "EPHY_LED2_N_JTMS"
348 PIN 15: "EPHY_LED3_N_JTCLK"
349 PIN 16: "EPHY_LED4_N_JTRST_N"
350 PIN 17: "WF2G_LED_N"
351 PIN 18: "WF5G_LED_N"
352 PIN 19: "I2C_SDA"
353 PIN 20: "I2C_SCL"
354 PIN 21: "GPIO_9"
355 PIN 22: "GPIO_10"
356 PIN 23: "GPIO_11"
357 PIN 24: "GPIO_12"
358 PIN 25: "UART1_TXD"
359 PIN 26: "UART1_RXD"
360 PIN 27: "UART1_CTS"
361 PIN 28: "UART1_RTS"
362 PIN 29: "UART2_TXD"
363 PIN 30: "UART2_RXD"
364 PIN 31: "UART2_CTS"
365 PIN 32: "UART2_RTS"
366 PIN 33: "MDI_TP_P1"
367 PIN 34: "MDI_TN_P1"
368 PIN 35: "MDI_RP_P1"
369 PIN 36: "MDI_RN_P1"
370 PIN 37: "MDI_RP_P2"
371 PIN 38: "MDI_RN_P2"
372 PIN 39: "MDI_TP_P2"
373 PIN 40: "MDI_TN_P2"
374 PIN 41: "MDI_TP_P3"
375 PIN 42: "MDI_TN_P3"
376 PIN 43: "MDI_RP_P3"
377 PIN 44: "MDI_RN_P3"
378 PIN 45: "MDI_RP_P4"
379 PIN 46: "MDI_RN_P4"
380 PIN 47: "MDI_TP_P4"
381 PIN 48: "MDI_TN_P4"
382 PIN 49: "SMI_MDC"
383 PIN 50: "SMI_MDIO"
384 PIN 51: "PCIE_PERESET_N"
385 PIN 52: "PWM_0"
386 PIN 53: "GPIO_0"
387 PIN 54: "GPIO_1"
388 PIN 55: "GPIO_2"
389 PIN 56: "GPIO_3"
390 PIN 57: "GPIO_4"
391 PIN 58: "GPIO_5"
392 PIN 59: "GPIO_6"
393 PIN 60: "GPIO_7"
394 PIN 61: "GPIO_8"
395 PIN 62: "SPI_CLK"
396 PIN 63: "SPI_CS"
397 PIN 64: "SPI_MOSI"
398 PIN 65: "SPI_MISO"
399 PIN 66: "SPI_WP"
400 PIN 67: "SPI_HOLD"
401 PIN 68: "UART0_TXD"
402 PIN 69: "UART0_RXD"
403 PIN 70: "TOP_2G_CLK"
404 PIN 71: "TOP_2G_DATA"
405 PIN 72: "WF0_2G_HB0"
406 PIN 73: "WF0_2G_HB1"
407 PIN 74: "WF0_2G_HB2"
408 PIN 75: "WF0_2G_HB3"
409 PIN 76: "WF0_2G_HB4"
410 PIN 77: "WF0_2G_HB5"
411 PIN 78: "WF0_2G_HB6"
418 Valid value function pins (in pin#)
419 ----------------------------------------------------------------
456 7, 8, 9, 10
461 compatible = "mediatek,mt7622-pinctrl";
463 gpio-controller;
464 #gpio-cells = <2>;
466 pinctrl_eth_default: eth-default {
467 mux-mdio {
470 drive-strength = <12>;
473 mux-gmac2 {
476 drive-strength = <12>;
479 mux-esw {
482 drive-strength = <8>;
485 conf-mdio {
487 bias-pull-up;